From: Andi Kleen <ak@suse.de>
To: discuss@x86-64.org, sergio@sergiomb.no-ip.org
Cc: torvalds@osdl.org, linux-kernel@vger.kernel.org
Subject: Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC
Date: Tue, 1 Aug 2006 23:56:52 +0200 [thread overview]
Message-ID: <200608012356.52893.ak@suse.de> (raw)
In-Reply-To: <1154468420.2991.5.camel@localhost.portugal>
On Tuesday 01 August 2006 23:40, Sergio Monteiro Basto wrote:
> On Tue, 2006-08-01 at 19:10 +0200, Andi Kleen wrote:
> > > I had some faith in this patch , but this just enable boot parameter
> > > notsc (which I already use). And "just" disable tsc don't solve all
> > the
> > > problems.
> >
> > What problems do you have?
> >
> Hi Andi ,
> if I boot without notsc , I have many lost timer tickets.
Lost timer ticks print a rip. Do you have some samples?
Anyways, for a single socket Intel dual core TSCs should be definitely
synced so I don't know what could be wrong on your system.
Please post full boot.msg at least.
-Andi
next prev parent reply other threads:[~2006-08-01 21:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-29 19:42 [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC Andi Kleen
2006-08-01 13:04 ` Sergio Monteiro Basto
2006-08-01 17:10 ` [discuss] " Andi Kleen
2006-08-01 21:40 ` Sergio Monteiro Basto
2006-08-01 21:56 ` Andi Kleen [this message]
[not found] ` <1154470000.5123.1.camel@localhost.portugal>
2006-08-01 22:21 ` Andi Kleen
2006-08-01 22:52 ` Sergio Monteiro Basto
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