From: Andi Kleen <ak@suse.de>
To: discuss@x86-64.org, sergio@sergiomb.no-ip.org
Cc: torvalds@osdl.org, linux-kernel@vger.kernel.org, "Siddha,
Suresh B" <suresh.b.siddha@intel.com>
Subject: Re: [discuss] Re: [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC
Date: Wed, 2 Aug 2006 00:21:47 +0200 [thread overview]
Message-ID: <200608020021.47623.ak@suse.de> (raw)
In-Reply-To: <1154470000.5123.1.camel@localhost.portugal>
On Wednesday 02 August 2006 00:06, Sergio Monteiro Basto wrote:
> On Tue, 2006-08-01 at 23:56 +0200, Andi Kleen wrote:
> > Lost timer ticks print a rip. Do you have some samples?
Can you send dmesg with the following patch applied too?
cc'ing Suresh because he might have an explanation too then.
-Andi
Index: linux-2.6.18-rc3-work/arch/x86_64/kernel/smpboot.c
===================================================================
--- linux-2.6.18-rc3-work.orig/arch/x86_64/kernel/smpboot.c
+++ linux-2.6.18-rc3-work/arch/x86_64/kernel/smpboot.c
@@ -345,7 +345,7 @@ static void __cpuinit tsc_sync_wait(void
* mess up a possible perfect synchronization with a
* not-quite-perfect algorithm.
*/
- if (notscsync || !cpu_has_tsc || !unsynchronized_tsc())
+ if (0 && (notscsync || !cpu_has_tsc || !unsynchronized_tsc()))
return;
sync_tsc(0);
}
next prev parent reply other threads:[~2006-08-01 22:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-07-29 19:42 [PATCH for 2.6.18] [2/8] x86_64: On Intel systems when CPU has C3 don't use TSC Andi Kleen
2006-08-01 13:04 ` Sergio Monteiro Basto
2006-08-01 17:10 ` [discuss] " Andi Kleen
2006-08-01 21:40 ` Sergio Monteiro Basto
2006-08-01 21:56 ` Andi Kleen
[not found] ` <1154470000.5123.1.camel@localhost.portugal>
2006-08-01 22:21 ` Andi Kleen [this message]
2006-08-01 22:52 ` Sergio Monteiro Basto
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