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From: Andi Kleen <ak@suse.de>
To: Christoph Lameter <clameter@sgi.com>
Subject: Re: Why Semaphore Hardware-Dependent?
Date: Tue, 29 Aug 2006 19:22:04 +0200
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On Tuesday 29 August 2006 17:56, Christoph Lameter wrote:
> On Tue, 29 Aug 2006, David Howells wrote:
> 
> > Because i386 (and x86_64) can do better by using XADDL/XADDQ.
> 
> And Ia64 would like to use fetchadd....

This might be a dumb question, but I would expect even on altix 
with lots of parallel faulting threads rwsem performance be basically
limited by aquiring the cache line and releasing it later to another CPU.

Do you really think it will make much difference what particular atomic
operation is used? The basic cost of sending the cache line over the
interconnect should be all the same, no? And once the cache line is local
it should be reasonably fast either way.

> > CMPXCHG is not available on all archs, and may not be implemented on all archs
> > through other atomic instructions.
> 
> Which arches do not support cmpxchg?

parisc at least iirc (it practically doesn't support very much atomically)
and likely sparcv8.

-Andi