* New Intel feature flags.
@ 2006-09-24 1:15 Dave Jones
2006-09-24 1:21 ` Michal Piotrowski
2006-09-24 8:50 ` Andi Kleen
0 siblings, 2 replies; 7+ messages in thread
From: Dave Jones @ 2006-09-24 1:15 UTC (permalink / raw)
To: Linux Kernel; +Cc: ak
Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
As described in "Intel Processor idenfication and the CPUID instruction
AP485 Sept 2006"
Signed-off-by: Dave Jones <davej@redhat.com>
--- local-git/arch/i386/kernel/cpu/proc.c~ 2006-09-23 20:46:35.000000000 -0400
+++ local-git/arch/i386/kernel/cpu/proc.c 2006-09-23 20:48:02.000000000 -0400
@@ -46,8 +46,8 @@ static int show_cpuinfo(struct seq_file
/* Intel-defined (#2) */
"pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
- "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
- NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+ "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
+ NULL, NULL, "dca", NULL, NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
/* VIA/Cyrix/Centaur-defined */
--
http://www.codemonkey.org.uk
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-24 1:15 New Intel feature flags Dave Jones
@ 2006-09-24 1:21 ` Michal Piotrowski
2006-09-24 1:28 ` Dave Jones
2006-09-24 8:50 ` Andi Kleen
1 sibling, 1 reply; 7+ messages in thread
From: Michal Piotrowski @ 2006-09-24 1:21 UTC (permalink / raw)
To: Dave Jones, Linux Kernel, ak
Hi Dave,
On 24/09/06, Dave Jones <davej@redhat.com> wrote:
> Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> As described in "Intel Processor idenfication and the CPUID instruction
> AP485 Sept 2006"
>
> Signed-off-by: Dave Jones <davej@redhat.com>
>
> --- local-git/arch/i386/kernel/cpu/proc.c~ 2006-09-23 20:46:35.000000000 -0400
> +++ local-git/arch/i386/kernel/cpu/proc.c 2006-09-23 20:48:02.000000000 -0400
> @@ -46,8 +46,8 @@ static int show_cpuinfo(struct seq_file
>
> /* Intel-defined (#2) */
> "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
> - "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
> - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> + "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
ssse3? Typo?
> + NULL, NULL, "dca", NULL, NULL, NULL, NULL, NULL,
> NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
>
> /* VIA/Cyrix/Centaur-defined */
>
> --
> http://www.codemonkey.org.uk
> -
Regards,
Michal
--
Michal K. K. Piotrowski
LTG - Linux Testers Group
(http://www.stardust.webpages.pl/ltg/)
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-24 1:21 ` Michal Piotrowski
@ 2006-09-24 1:28 ` Dave Jones
0 siblings, 0 replies; 7+ messages in thread
From: Dave Jones @ 2006-09-24 1:28 UTC (permalink / raw)
To: Michal Piotrowski; +Cc: Linux Kernel, ak
On Sun, Sep 24, 2006 at 03:21:06AM +0200, Michal Piotrowski wrote:
> Hi Dave,
>
> On 24/09/06, Dave Jones <davej@redhat.com> wrote:
> > Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> > As described in "Intel Processor idenfication and the CPUID instruction
> > AP485 Sept 2006"
> >
> > Signed-off-by: Dave Jones <davej@redhat.com>
> >
> > --- local-git/arch/i386/kernel/cpu/proc.c~ 2006-09-23 20:46:35.000000000 -0400
> > +++ local-git/arch/i386/kernel/cpu/proc.c 2006-09-23 20:48:02.000000000 -0400
> > @@ -46,8 +46,8 @@ static int show_cpuinfo(struct seq_file
> >
> > /* Intel-defined (#2) */
> > "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
> > - "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
> > - NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
> > + "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
>
> ssse3? Typo?
No. It stands for Supplemental SSE3. SSE is already indicated by 'pni'.
Dave
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-24 1:15 New Intel feature flags Dave Jones
2006-09-24 1:21 ` Michal Piotrowski
@ 2006-09-24 8:50 ` Andi Kleen
2006-09-24 18:28 ` Dave Jones
2006-09-25 3:02 ` Dave Jones
1 sibling, 2 replies; 7+ messages in thread
From: Andi Kleen @ 2006-09-24 8:50 UTC (permalink / raw)
To: Dave Jones; +Cc: Linux Kernel
On Sunday 24 September 2006 03:15, Dave Jones wrote:
> Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> As described in "Intel Processor idenfication and the CPUID instruction
> AP485 Sept 2006"
Added thanks. I also added it for x86-64
-Andi
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-24 8:50 ` Andi Kleen
@ 2006-09-24 18:28 ` Dave Jones
2006-09-25 3:02 ` Dave Jones
1 sibling, 0 replies; 7+ messages in thread
From: Dave Jones @ 2006-09-24 18:28 UTC (permalink / raw)
To: Andi Kleen; +Cc: Linux Kernel
On Sun, Sep 24, 2006 at 10:50:14AM +0200, Andi Kleen wrote:
> On Sunday 24 September 2006 03:15, Dave Jones wrote:
> > Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> > As described in "Intel Processor idenfication and the CPUID instruction
> > AP485 Sept 2006"
>
> Added thanks. I also added it for x86-64
Want a patch to make these shared?
Dave
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-24 8:50 ` Andi Kleen
2006-09-24 18:28 ` Dave Jones
@ 2006-09-25 3:02 ` Dave Jones
2006-09-25 3:03 ` Andi Kleen
1 sibling, 1 reply; 7+ messages in thread
From: Dave Jones @ 2006-09-25 3:02 UTC (permalink / raw)
To: Andi Kleen; +Cc: Linux Kernel
On Sun, Sep 24, 2006 at 10:50:14AM +0200, Andi Kleen wrote:
> On Sunday 24 September 2006 03:15, Dave Jones wrote:
> > Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> > As described in "Intel Processor idenfication and the CPUID instruction
> > AP485 Sept 2006"
>
> Added thanks. I also added it for x86-64
I just looked at ftp://ftp.firstfloor.org/pub/ak/x86_64/quilt-current/patches/new-intel-cpuid-flags
Somehow "ssse3" became "ssse2".
Dave
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: New Intel feature flags.
2006-09-25 3:02 ` Dave Jones
@ 2006-09-25 3:03 ` Andi Kleen
0 siblings, 0 replies; 7+ messages in thread
From: Andi Kleen @ 2006-09-25 3:03 UTC (permalink / raw)
To: Dave Jones; +Cc: Linux Kernel
On Monday 25 September 2006 05:02, Dave Jones wrote:
> On Sun, Sep 24, 2006 at 10:50:14AM +0200, Andi Kleen wrote:
> > On Sunday 24 September 2006 03:15, Dave Jones wrote:
> > > Add supplemental SSE3 instructions flag, and Direct Cache Access flag.
> > > As described in "Intel Processor idenfication and the CPUID instruction
> > > AP485 Sept 2006"
> >
> > Added thanks. I also added it for x86-64
>
> I just looked at ftp://ftp.firstfloor.org/pub/ak/x86_64/quilt-current/patches/new-intel-cpuid-flags
> Somehow "ssse3" became "ssse2".
Sorry fixed.
-Andi
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2006-09-25 3:05 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2006-09-24 1:15 New Intel feature flags Dave Jones
2006-09-24 1:21 ` Michal Piotrowski
2006-09-24 1:28 ` Dave Jones
2006-09-24 8:50 ` Andi Kleen
2006-09-24 18:28 ` Dave Jones
2006-09-25 3:02 ` Dave Jones
2006-09-25 3:03 ` Andi Kleen
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