From: "Siddha, Suresh B" <suresh.b.siddha@intel.com>
To: ak@suse.de, akpm@osdl.org
Cc: shaohua.li@intel.com, linux-kernel@vger.kernel.org,
discuss@x86-64.org, ashok.raj@intel.com,
suresh.b.siddha@intel.com
Subject: [patch 3/4] x86_64: add genapic_force
Date: Tue, 7 Nov 2006 17:43:15 -0800 [thread overview]
Message-ID: <20061107174315.C5401@unix-os.sc.intel.com> (raw)
In-Reply-To: <20061107174024.B5401@unix-os.sc.intel.com>; from suresh.b.siddha@intel.com on Tue, Nov 07, 2006 at 05:40:25PM -0800
Add genapic_force. Used by the next Intel quirks patch.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---
diff --git a/arch/x86_64/kernel/genapic.c b/arch/x86_64/kernel/genapic.c
index 8e78a75..236dc9e 100644
--- a/arch/x86_64/kernel/genapic.c
+++ b/arch/x86_64/kernel/genapic.c
@@ -33,7 +33,7 @@ extern struct genapic apic_flat;
extern struct genapic apic_physflat;
struct genapic *genapic = &apic_flat;
-
+struct genapic *genapic_force;
/*
* Check the APIC IDs in bios_cpu_apicid and choose the APIC mode.
@@ -46,6 +46,14 @@ void __init clustered_apic_check(void)
u8 cluster_cnt[NUM_APIC_CLUSTERS];
int max_apic = 0;
+ /* genapic selection can be forced because of certain quirks and
+ * in future perhaps user can select this through cmdline
+ */
+ if (genapic_force) {
+ genapic = genapic_force;
+ goto print;
+ }
+
#if defined(CONFIG_ACPI)
/*
* Some x86_64 machines use physical APIC mode regardless of how many
diff --git a/include/asm-x86_64/genapic.h b/include/asm-x86_64/genapic.h
index a0e9a4b..b80f4bb 100644
--- a/include/asm-x86_64/genapic.h
+++ b/include/asm-x86_64/genapic.h
@@ -30,6 +30,6 @@ struct genapic {
};
-extern struct genapic *genapic;
+extern struct genapic *genapic, *genapic_force, apic_flat;
#endif
next prev parent reply other threads:[~2006-11-08 2:05 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-08 1:33 [patch 0/4] i386, x86_64: fix the irqbalance quirk for E7520/E7320/E7525 Siddha, Suresh B
2006-11-08 1:36 ` [patch 1/4] add write_pci_config_byte() to direct PCI access routines Siddha, Suresh B
2006-11-08 1:40 ` [patch 2/4] introduce the mechanism of disabling cpu hotplug control Siddha, Suresh B
2006-11-08 1:43 ` Siddha, Suresh B [this message]
2006-11-08 1:46 ` [patch 4/4] fix the irqbalance quirk for E7320/E7520/E7525 Siddha, Suresh B
2006-11-08 3:54 ` [patch 2/4] introduce the mechanism of disabling cpu hotplug control Andrew Morton
2006-11-08 4:01 ` Siddha, Suresh B
2006-11-08 4:35 ` Andrew Morton
2006-11-08 5:23 ` Siddha, Suresh B
2006-11-11 0:43 ` [patch] change the 'no_control' field to 'hotpluggable' in the struct cpu Siddha, Suresh B
2006-11-08 4:07 ` [patch 0/4] i386, x86_64: fix the irqbalance quirk for E7520/E7320/E7525 Andrew Morton
2006-11-08 4:06 ` Siddha, Suresh B
-- strict thread matches above, loose matches on Subject: below --
2006-11-09 1:20 [patch 0/4] i386, x86_64: fix the irqbalance quirk for E7520/E7320/E7525 - V2 Siddha, Suresh B
2006-11-09 1:29 ` [patch 3/4] x86_64: add genapic_force Siddha, Suresh B
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