From: Andi Kleen <ak@suse.de>
To: "Bela Lubkin" <blubkin@vmware.com>
Cc: linux-kernel@vger.kernel.org, mingo@elte.hu
Subject: Re: touch_cache() only touches two thirds
Date: Sat, 11 Nov 2006 01:23:38 +0100 [thread overview]
Message-ID: <200611110123.38309.ak@suse.de> (raw)
In-Reply-To: <FE74AC4E0A23124DA52B99F17F44159701DBBFE7@PA-EXCH03.vmware.com>
> The corrected code in <http://bugzilla.kernel.org/show_bug.cgi?id=7476#c4>
> covers the full cache range. Granted that modern CPUs may be able to track
> multiple simultaneous cache access streams: how many such streams are they
> likely to be able to follow at once? It seems like going from 1 to 2 would
> be a big win, 2 to 3 a small win, beyond that it wouldn't likely make much
> incremental difference. So what do the actual implementations in the field
> support?
I remember reading at some point that a POWER4 could track at least 5+ parallel
streams. I don't know how many K8 handles, but it is multiple too at least
(forward and backwards)
I don't have more data, but at least the newer Intel CPUs seem to be also
very good at prefetching and when you look at a die photo the L/S unit
in general is quite big. More than 6 streams handled is certainly a
possibility.
I guess it could be figured out with some clever benchmarking.
>
> The code (original and corrected) uses 6 simultaneous streams.
My gut feeling is that this is not enough.
> I have a modified version that takes a `ways' parameter to use an arbitrary
> number of streams. I'll post that onto bugzilla.kernel.org.
Post it to the list please.
-Andi
next prev parent reply other threads:[~2006-11-11 0:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-09 0:56 touch_cache() only touches two thirds Bela Lubkin
2006-11-10 8:25 ` Andi Kleen
2006-11-11 0:12 ` Bela Lubkin
2006-11-11 0:23 ` Andi Kleen [this message]
2006-11-11 1:48 ` Bela Lubkin
2006-11-18 4:18 ` dean gaudet
2006-11-18 4:31 ` dean gaudet
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