Re: [PATCH -rt][RESEND] fix preempt hardirqs on OMAP

[Tony Lindgren <tony@atomide.com>]

Hi,

* Daniel Walker <dwalker@mvista.com> [061211 11:41]:
> On Mon, 2006-12-11 at 20:05 +0100, Ingo Molnar wrote:
> > * Daniel Walker <dwalker@mvista.com> wrote:
> > 
> > > +	/*
> > > +	 * Some boards will disable an interrupt when it
> > > +	 * sets IRQ_PENDING . So we have to remove the flag
> > > +	 * and re-enable to handle it.
> > > +	 */
> > > +	if (desc->status & IRQ_PENDING) {
> > > +		desc->status &= ~IRQ_PENDING;
> > > +		if (desc->chip)
> > > +			desc->chip->enable(irq);
> > > +		goto restart;
> > > +	}
> > 
> > what if the irq got disabled meanwhile? Also, chip->enable is a 
> > compatibility method, not something we should use in a flow handler.
> 
> I don't know how other arches deal with IRQ_PENDING, but ARM (OMAP at
> least) disables the IRQ on IRQ_PENDING. The problem is that by threading
> the IRQ we take some control away from the low level code, which needs
> to be replaced.
> 
> I'm open to potentially removing the irq disable()->enable() cycle on
> IRQ_PENDING if it's only done on OMAP. My feeling is that it's in other
> ARM's which would make that change more invasive, but I haven't actually
> researched that.

Hmm, I wonder if this is just legacy left over from earlier when
set_irq_type() was used and the flags not passed with request_irq().
This was causing some omap gpio interrupts to trigger immediately
after request_irq().

Regards,

Tony