From: Alan <alan@lxorguk.ukuu.org.uk>
To: takada@mbf.nifty.com, akpm@osdl.org, linux-kernel@vger.kernel.org
Subject: PATCH] cyrix: fails to detect MediaGX
Date: Wed, 31 Jan 2007 17:20:15 +0000 [thread overview]
Message-ID: <20070131172015.7ea31dc8@localhost.localdomain> (raw)
The old Cyrix 5520 CPU detection code relied upon the PCI layer setup
being done earlier than the CPU setup, which is no longer true.
Fortunately we know that if the processor is a MediaGX we can do type 1
pci config accesses to check the companion chip. We thus do those
directly and from this find the 5520 and implement the workarounds for
the timer problem
Original report from takada@mbf.nifty.com, I sent a proposed patch which
Takara then corrected, tested and sent back to the list on 10th January.
Submitting for merging as it seems to have been missed
Signed-off-by: Alan Cox <alan@redhat.com>
diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla-2.6.20-rc6-mm3/arch/i386/kernel/cpu/cyrix.c linux-2.6.20-rc6-mm3/arch/i386/kernel/cpu/cyrix.c
--- linux.vanilla-2.6.20-rc6-mm3/arch/i386/kernel/cpu/cyrix.c 2007-01-31 14:20:38.000000000 +0000
+++ linux-2.6.20-rc6-mm3/arch/i386/kernel/cpu/cyrix.c 2007-01-31 14:24:47.000000000 +0000
@@ -8,6 +8,7 @@
#include <asm/timer.h>
#include "cpu.h"
+#include "../../pci/pci.h"
/*
* Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU
@@ -183,19 +184,12 @@
}
-#ifdef CONFIG_PCI
-static struct pci_device_id __cpuinitdata cyrix_55x0[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510) },
- { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520) },
- { },
-};
-#endif
-
static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
{
unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0;
char *buf = c->x86_model_id;
const char *p = NULL;
+ u32 vendor, device;
/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
@@ -273,11 +267,16 @@
printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n");
isa_dma_bridge_buggy = 2;
+ /* We do this before the PCI layer is running. However we
+ are safe here as we know the bridge must be a Cyrix
+ companion and must be present */
+ pci_conf1_read(0, 0, PCI_DEVFN(0x12, 0), PCI_VENDOR_ID, 2, &vendor);
+ pci_conf1_read(0, 0, PCI_DEVFN(0x12, 0), PCI_DEVICE_ID, 2, &device);
/*
* The 5510/5520 companion chips have a funky PIT.
*/
- if (pci_dev_present(cyrix_55x0))
+ if (vendor == PCI_VENDOR_ID_CYRIX && (device == PCI_DEVICE_ID_CYRIX_5510 || device == PCI_DEVICE_ID_CYRIX_5520))
pit_latch_buggy = 1;
#endif
c->x86_cache_size=16; /* Yep 16K integrated cache thats it */
reply other threads:[~2007-01-31 17:08 UTC|newest]
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