Re: ioread32 endianess.

[Kyle McMartin <kyle@mcmartin.ca>]

On Tue, Feb 27, 2007 at 08:20:21AM -0500, Kyle McMartin wrote:
> PCI is always little endian, unless it's not. In which case you're probably
> dealing with a graphics card which likely has some kind of palindromic
> register which you can read and write to set the endianness of the host
> interface. Whoo. Run on sentence.
> 

Perhaps we should have a Documentation/ entry for this...

io(read|write){8,16,32} are the "pci iomap" functions (see
asm-generic/iomap.h) they always byteswap so the value is little endian.

io(read|write){8,16,32}be are sister functions added to deal with big
endian busses. They always byteswap so the value is in big endian.

Both these previous functions can handle using a cookie based on an IO port
range, or an MMIO region.

(read|write){b,w,l} are the old style MMIO-mapped accessors. They also always
byteswap so the value is in little endian. There is no big endian equivalent
for the generic case.

__raw_(read|write){b,w,l} are also old style accessors. They always operate
in host endianness.

The above are (AFAIK) the only functions guaranteed to exist for MMIO.

Of course, most platforms either provide (in|out){b,w,l} or don't support
Port IO as well, but MMIO is the really complicated case.

In any event, <asm-generic/iomap.h> should shed a bit more light on using
these.

Cheers,
	Kyle M.