Re: [PATCH 2.6.20.4] Flush MSI-X table writes (rev 3)

[Greg KH <gregkh@suse.de>]

On Fri, Mar 30, 2007 at 12:03:47PM -0700, Mitch Williams wrote:
> This patch fixes a kernel bug which is triggered when using the
> irqbalance daemon with MSI-X hardware.
> 
> Because both MSI-X interrupt messages and MSI-X table writes are posted,
> it's possible for them to cross while in-flight.  This results in
> interrupts being received long after the kernel thinks they're disabled,
> and in interrupts being sent to stale vectors after rebalancing.
> 
> This patch performs a read flush after writes to the MSI-X table for
> mask and unmask operations.  Since the SMP affinity is set while
> the interrupt is masked, and since it's unmasked immediately after,
> no additional flushes are required in the various affinity setting
> routines.
> 
> This patch has been validated with (unreleased) network hardware which
> uses MSI-X.
> 
> Revised with input from Eric Biederman.
> 
> Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>

Sorry, but this isn't going to go into 2.6.20 any time soon as it
doesn't fit the rules for the -stable tree.

But I'll take an updated version for my pci tree to go to Linus after
2.6.21 is out.

thanks,

greg k-h