Re: What protects cpu_tlbstate?

[Andi Kleen <ak@suse.de>]

On Thursday 05 April 2007 23:00:22 Jeremy Fitzhardinge wrote:
> Andi Kleen wrote:
> > The interrupts can only happen when the other CPU is already lazy
> > and enter_lazy_tlb would be a nop then.  The flushers itself are
> > synchronized by the page_table_lock or the mm semaphore.
> >
> > Against switch_mm it tries to protect with ordering.
> >
> > wmb()s are not needed on x86 (ok minus errata on ppro and
> > VIA magic mode but which is UP only). That would leave some rmb()s,
> > but I don't see any place they would be needed. 
> >   
> 
> Hm, I was more wondering about simple compiler reordering.  Does the
> relative order of setting and reading cpu_tlbstate.state, active_mm and
> the mm->cpu_vm_mask matter?

Hmm, perhaps a barrier between state and active_mm might be a good idea.
Setting active_mm after state might be problematic.
cpu_vm_mask should be already a memory barrier.

-Andi