From: "Andreas Herrmann" <andreas.herrmann3@amd.com>
To: linux-kernel@vger.kernel.org
Cc: "Andi Kleen" <ak@suse.de>
Subject: [PATCH] i386: prevent auto select of mwait_idle for AMD CPUs
Date: Tue, 10 Apr 2007 19:28:45 +0200 [thread overview]
Message-ID: <20070410172845.GA12476@alberich.amd.com> (raw)
This fix is needed for AMD family 10h CPUs.
It prevents auto select of mwait_idle for AMD CPUs.
MWAIT does not enter C-states on family 10h and more
power saving is reached by entering C1 with
default_idle.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
arch/i386/kernel/cpu/amd.c | 4 ++++
arch/i386/kernel/process.c | 3 ++-
include/asm-i386/cpufeature.h | 1 +
3 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index 2d47db4..e056271 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -275,6 +275,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
if (amd_apic_timer_broken())
set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability);
+
+ /* prevent auto select of mwait_idle */
+ if (cpu_has(c, X86_FEATURE_MWAIT))
+ set_bit(X86_FEATURE_MWAIT_NO_CSTATE, c->x86_capability);
}
static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c
index 393a67d..64db049 100644
--- a/arch/i386/kernel/process.c
+++ b/arch/i386/kernel/process.c
@@ -259,7 +259,8 @@ static void mwait_idle(void)
void __devinit select_idle_routine(const struct cpuinfo_x86 *c)
{
- if (cpu_has(c, X86_FEATURE_MWAIT)) {
+ if (cpu_has(c, X86_FEATURE_MWAIT) &&
+ !cpu_has(c, X86_FEATURE_MWAIT_NO_CSTATE)) {
printk("monitor/mwait feature present.\n");
/*
* Skip, if setup has overridden idle.
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h
index d1b8e4a..f7f633d 100644
--- a/include/asm-i386/cpufeature.h
+++ b/include/asm-i386/cpufeature.h
@@ -76,6 +76,7 @@
#define X86_FEATURE_PEBS (3*32+12) /* Precise-Event Based Sampling */
#define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */
#define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */
+#define X86_FEATURE_MWAIT_NO_CSTATE (3*32+15) /* mwait does not enter c-state */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
--
1.5.0.6
reply other threads:[~2007-04-10 17:28 UTC|newest]
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