From: Andi Kleen <ak@suse.de>
To: "Joachim Deguara" <joachim.deguara@amd.com>
Cc: linux-kernel@vger.kernel.org, "Langsdorf, Mark" <mark.langsdorf@amd.com>
Subject: Re: [PATCH] x86_64: make GART PTEs uncacheable
Date: Mon, 23 Apr 2007 11:32:30 +0200 [thread overview]
Message-ID: <200704231132.30736.ak@suse.de> (raw)
In-Reply-To: <200704231114.10327.joachim.deguara@amd.com>
On Monday 23 April 2007 11:14:10 Joachim Deguara wrote:
> This patches fixes the silent data corruption problems being seen using the
> GART iommu where 4kB of data where incorrect (seen mostly on Nvidia CK804
> systems).
Performance numbers? How much slower does this make this? Is it still faster
than swiotlb?
Also this will always split up the direct memory mapping of the kernel,
so you'll lose more TLB entries even for other data.
> This fix, to mark the memory regin the GART PTEs reside on as
> uncacheable, also brings the code in line with the AGP specification.
Where in the AGP specification? I can't find any such requirement
in AGPv3
-Andi
next prev parent reply other threads:[~2007-04-23 9:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-04-23 9:14 [PATCH] x86_64: make GART PTEs uncacheable Joachim Deguara
2007-04-23 9:32 ` Andi Kleen [this message]
2007-04-23 9:45 ` Joachim Deguara
2007-04-23 9:47 ` Andi Kleen
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