From: Randy Dunlap <randy.dunlap@oracle.com>
To: "Peter Oruba" <peter.oruba@amd.com>
Cc: gregkh@suse.de, cramerj@intel.com, john.ronciak@intel.com,
jesse.brandeburg@intel.com, jeffrey.t.kirsher@intel.com,
auke-jan.h.kok@intel.com, rolandd@cisco.com, halr@voltaire.com,
linux-driver@qlogic.com,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
"Stephen Hemminger" <shemminger@linux-foundation.org>
Subject: Re: [PATCH 1/2] PCI-X/PCI-Express read control interfaces
Date: Wed, 16 May 2007 10:10:27 -0700 [thread overview]
Message-ID: <20070516101027.b3767f18.randy.dunlap@oracle.com> (raw)
In-Reply-To: <200705151359.15116.peter.oruba@amd.com>
On Tue, 15 May 2007 13:59:13 +0200 Peter Oruba wrote:
> This patch introduces an interface to read and write PCI-X / PCI-Express
> maximum read byte count values from PCI config space. There is a second
> function that returns the maximum _designed_ read byte count, which marks the
> maximum value for a device, since some drivers try to set MMRBC to the
> highest allowed value and rely on such a function.
>
> Signed-off by: Peter Oruba <peter.oruba@amd.com>
> Based on patch set by Stephen Hemminger <shemminger@linux-foundation.org>
>
> ---
> diff -uprN -X linux-2.6.22-rc1.orig/Documentation/dontdiff
> linux-2.6.22-rc1.orig/drivers/pci/pci.c linux-2.6.22-rc1/drivers/pci/pci.c
> --- linux-2.6.22-rc1.orig/drivers/pci/pci.c 2007-05-14 11:29:39.473498000
> +0200
> +++ linux-2.6.22-rc1/drivers/pci/pci.c 2007-05-15 11:44:33.804254000 +0200
> @@ -1375,6 +1375,170 @@ pci_set_consistent_dma_mask(struct pci_d
> #endif
>
> /**
> + * pcix_get_max_mmrbc - get PCI-X maximum designed memory read byte count
> + * @dev: PCI device to query
> + *
> + * Returns mmrbc: maximum designed memory read count in bytes
> + * or appropriate error value.
> + */
> +int
> +pcix_get_max_mmrbc(struct pci_dev *dev)
Kernel style is like so (referring to multiple occurrences):
int pcix_get_max_mmrbc(struct pci_dev *dev)
Yes, that source file does it both ways (and needs to be Fixed).
> +{
> + int ret, err, cap;
> + u32 stat;
> +
> + cap = pci_find_capability(dev, PCI_CAP_ID_PCIX);
> + if (!cap)
> + return -EINVAL;
> +
> + err = pci_read_config_dword(dev, cap + PCI_X_STATUS, &stat);
> + if (err)
> + return -EINVAL;
> +
> + ret = (stat & PCI_X_STATUS_MAX_READ) >> 12;
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(pcix_get_max_mmrbc);
> +
> +
> +/**
> + * pcix_set_mmrbc - set PCI-X maximum memory read byte count
> + * @dev: PCI device to query
> + * @mmrbc: maximum memory read count in bytes
> + * valid values are 512, 1024, 2048, 4096
> + *
> + * If possible sets maximum memory read byte count, some bridges have erratas
"errata" is plural.
> + * that prevent this.
> + */
> +int
> +pcix_set_mmrbc(struct pci_dev *dev, int mmrbc)
> +{
...
> +}
> +EXPORT_SYMBOL(pcix_set_mmrbc);
> +
> +/**
> + * pcie_get_readrq - get PCI Express read request size
> + * @dev: PCI device to query
> + *
> + * Returns maximum memory read request in bytes
> + * or appropriate error value.
> + */
> +int pcie_get_readrq(struct pci_dev *dev)
:)
> +{
> + int ret, cap;
> + u16 ctl;
> +
> + cap = pci_find_capability(dev, PCI_CAP_ID_EXP);
> + if (!cap)
> + return -EINVAL;
> +
> + ret = pci_read_config_word(dev, cap + PCI_EXP_DEVCTL, &ctl);
> + if (!ret)
> + ret = 128 << ((ctl & PCI_EXP_DEVCTL_READRQ) >> 12);
> +
> + return ret;
> +}
> +EXPORT_SYMBOL(pcie_get_readrq);
> +
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
next prev parent reply other threads:[~2007-05-16 17:06 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-15 11:50 [PATCH 0/2] PCI-X/PCI-Express read control interfaces Peter Oruba
2007-05-15 11:59 ` [PATCH 1/2] " Peter Oruba
2007-05-16 17:10 ` Randy Dunlap [this message]
2007-05-15 12:03 ` [PATCH 2/2] " Peter Oruba
2007-05-15 20:32 ` Jeff Kirsher
2007-05-15 19:37 ` [PATCH 0/2] " Andrew Morton
2007-05-15 20:51 ` Kok, Auke
2007-05-15 21:35 ` Andrew Vasquez
2007-05-16 14:39 ` [PATCH 0/2] PCI-X/PCI-Express read control interfaces - Patch correction Peter Oruba
2007-05-16 11:05 ` [PATCH 0/2] PCI-X/PCI-Express read control interfaces Peter Oruba
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