From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: "Udo A. Steinberg" <us15@os.inf.tu-dresden.de>
Cc: Venki Pallipadi <venkatesh.pallipadi@intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Andrew Morton <akpm@osdl.org>,
Thomas Gleixner <tglx@linutronix.de>, Andi Kleen <ak@suse.de>,
Ingo Molnar <mingo@elte.hu>, Chris Wright <chrisw@sous-sol.org>
Subject: Re: [PATCH 4/8] Force detect and enable HPET on ICH
Date: Mon, 21 May 2007 08:46:03 -0700 [thread overview]
Message-ID: <200705210846.03540.jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <20070521025822.506c3287@laptop.hypervisor.org>
On Sunday, May 20, 2007, Udo A. Steinberg wrote:
> On Mon, 7 May 2007 13:31:28 -0700 Venki Pallipadi (VP) wrote:
>
> VP> Force detect and/or enable HPET on ICH chipsets. This patch just
> handles the VP> detection part and following patches use this
> information.
> VP>
> VP> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
>
> Venki,
>
> Is there any reason your patch only enables HPET on ICH6 and beyond?
> HPET can be enabled on earlier ICH by setting bit 17 in GEN_CNTL on PCI
> dev 31, func 0, offset d0. This seems to work for ICH3/4/5. Are there
> any errata affecting these ICHs?
I see it documented in the ICH5 datasheet, but that bit is marked reserved
in the ICH3 and ICH4 datasheets... Which docs are you looking at?
Jesse
next prev parent reply other threads:[~2007-05-21 15:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-07 20:31 [PATCH 4/8] Force detect and enable HPET on ICH Venki Pallipadi
2007-05-21 0:58 ` Udo A. Steinberg
2007-05-21 15:46 ` Jesse Barnes [this message]
2007-05-21 15:52 ` Pallipadi, Venkatesh
2007-05-21 15:53 ` Udo A. Steinberg
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