From: Jesse Barnes <jesse.barnes@intel.com>
To: "Yinghai Lu" <yhlu.kernel@gmail.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
"Arne Georg Gleditsch" <argggh@dolphinics.no>,
"Andreas Herrmann" <andreas.herrmann3@amd.com>,
"Robert Richter" <robert.richter@amd.com>,
"Arjan van de Ven" <arjan@infradead.org>,
patches@x86-64.org, linux-kernel@vger.kernel.org
Subject: Re: [patches] [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona
Date: Thu, 6 Sep 2007 10:48:25 -0700 [thread overview]
Message-ID: <200709061048.26532.jesse.barnes@intel.com> (raw)
In-Reply-To: <86802c440709061050x714a2bbbn776fb93cb46cdc49@mail.gmail.com>
On Thursday, September 6, 2007 10:50 am Yinghai Lu wrote:
> On 9/6/07, Jesse Barnes <jesse.barnes@intel.com> wrote:
> > The problem with doing that is it would mean reserving some address
> > space for mmconfig usage. If the BIOS doesn't completely describe
> > all the reserved regions via e820 or similar (apparently a common
> > problem) we may end up making mmconfig overlap with another
> > important area... It's pretty hard not to trust the BIOS here
> > without completely replacing big chunks of it.
>
> for Family 10h, you can use mmio range high beyond than the RAM
> range...( just don't conflict with HT reserved range...)
Sure, and on some Intel platforms we can configure things similarly.
But any such changes will be platform specific. I'm just not sure
allocating mmconfig space ourselves is worth the trouble. Besides,
most machines made in the last few years can do it, as long as we look
at the right BIOS bits (i.e. MCFG not e820) and remember to disable PCI
device decode when probing BAR sizes for example. :)
Jesse
next prev parent reply other threads:[~2007-09-06 17:54 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-09-03 8:17 [patch 0/5] (resent) x86: PCI extended config space access on AMD Barcelona CPUs Robert Richter
2007-09-03 8:17 ` [patch 1/5] x86: Add AMD64 Barcelona PMU MSR definitions Robert Richter
2007-09-03 8:17 ` [patch 2/5] x86: Add AMD64 Barcelona NB cfg " Robert Richter
2007-09-03 8:17 ` [patch 3/5] x86: Add PCI extended config space access for AMD Barcelona Robert Richter
2007-09-03 8:31 ` Arjan van de Ven
2007-09-03 9:17 ` [patches] " Andreas Herrmann
2007-09-03 11:33 ` Arjan van de Ven
2007-09-03 15:47 ` Andreas Herrmann
2007-09-05 5:58 ` H. Peter Anvin
2007-09-05 8:44 ` Robert Richter
2007-09-05 10:12 ` H. Peter Anvin
2007-09-05 10:35 ` Robert Richter
2007-09-05 11:05 ` Arne Georg Gleditsch
2007-09-05 16:13 ` Andreas Herrmann
2007-09-05 22:42 ` Yinghai Lu
2007-09-06 8:31 ` Arne Georg Gleditsch
2007-09-06 9:48 ` H. Peter Anvin
2007-09-06 17:41 ` Jesse Barnes
2007-09-06 17:50 ` Yinghai Lu
2007-09-06 17:48 ` Jesse Barnes [this message]
2007-09-06 17:48 ` Yinghai Lu
2007-09-05 15:00 ` Andreas Herrmann
2007-09-06 10:14 ` Arjan van de Ven
2007-09-03 8:17 ` [patch 4/5] x86: Add PCI IDs for AMD Barcelona PCI devices Robert Richter
2007-09-03 8:17 ` [patch 5/5] x86: Set PCI config space size to extended for AMD Barcelona Robert Richter
2007-09-03 16:48 ` dean gaudet
2007-09-03 18:18 ` Robert Richter
2007-09-03 19:01 ` Martin Mares
[not found] <20070830174311.221133000@amd.com>
[not found] ` <20070830174311.536394000@amd.com>
2007-09-01 10:11 ` [patch 3/5] x86: Add PCI extended config space access " Andi Kleen
2007-09-03 8:32 ` [patches] " Andreas Herrmann
2007-09-03 10:15 ` Andi Kleen
2007-09-03 11:27 ` Robert Richter
2007-09-03 12:48 ` Andi Kleen
2007-09-03 14:48 ` Robert Richter
2007-09-03 15:24 ` Andi Kleen
2007-09-04 6:54 ` Yinghai Lu
2007-09-04 7:20 ` Andi Kleen
2007-09-03 11:31 ` Andreas Herrmann
2007-09-03 12:52 ` Andi Kleen
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