* [PATCH] x86_64: check and enable MMCONFIG for AMD Family 10h Opteron
@ 2007-09-12 19:33 Yinghai Lu
2007-09-12 22:42 ` Andrew Morton
0 siblings, 1 reply; 2+ messages in thread
From: Yinghai Lu @ 2007-09-12 19:33 UTC (permalink / raw)
To: Andrew Morton, Andi Kleen, Jeff Garzik, Greg KH; +Cc: Linux Kernel Mailing List
[PATCH] x86_64: check and enable MMCONFIG for AMD Family 10h Opteron
Signed-off-by: Yinghai Lu <yinghai.lu@sun.com>
Index: linux-2.6/arch/x86_64/kernel/setup.c
===================================================================
--- linux-2.6.orig/arch/x86_64/kernel/setup.c 2007-09-12 11:28:08.000000000 -0700
+++ linux-2.6/arch/x86_64/kernel/setup.c 2007-09-12 12:09:32.000000000 -0700
@@ -507,6 +507,32 @@
}
#endif
+/*[39:8] */
+/* why not using 0xfe000000 ? */
+#define FAM10H_PCI_MMIO_BASE 0xc0000000
+static void fam10h_check_enable_mmcfg(struct cpuinfo_x86 *c)
+{
+ u32 low, high, address;
+
+ address = 0xc0010058;
+ if (rdmsr_safe(address, &low, &high))
+ return;
+
+ if (low & 1)
+ return;
+
+ printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");
+ /*
+ * if it is not enable, let enable it and assume only one segement
+ * with 256 buses
+ */
+ low &= ~(0xfff00000 | (0xf<<2));
+ low |= (8<<2) | (1<<0);
+ high &= ~(0x0000ffff);
+ high |= (FAM10H_PCI_MMIO_BASE>>(32-8));
+ wrmsr_safe(address, low, high);
+}
+
/*
* On a AMD dual core setup the lower bits of the APIC id distingush the cores.
* Assumes number of cores is a power of two.
@@ -655,6 +681,9 @@
/* Family 10 doesn't support C states in MWAIT so don't use it */
if (c->x86 == 0x10 && !force_mwait)
clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);
+
+ if (c->x86 == 0x10)
+ fam10h_check_enable_mmcfg(c);
}
static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] x86_64: check and enable MMCONFIG for AMD Family 10h Opteron
2007-09-12 19:33 [PATCH] x86_64: check and enable MMCONFIG for AMD Family 10h Opteron Yinghai Lu
@ 2007-09-12 22:42 ` Andrew Morton
0 siblings, 0 replies; 2+ messages in thread
From: Andrew Morton @ 2007-09-12 22:42 UTC (permalink / raw)
To: Yinghai Lu; +Cc: Andi Kleen, Jeff Garzik, Greg KH, Linux Kernel Mailing List
On Wed, 12 Sep 2007 12:33:38 -0700
Yinghai Lu <Yinghai.Lu@Sun.COM> wrote:
> [PATCH] x86_64: check and enable MMCONFIG for AMD Family 10h Opteron
>
> Signed-off-by: Yinghai Lu <yinghai.lu@sun.com>
>
> Index: linux-2.6/arch/x86_64/kernel/setup.c
> ===================================================================
> --- linux-2.6.orig/arch/x86_64/kernel/setup.c 2007-09-12 11:28:08.000000000 -0700
> +++ linux-2.6/arch/x86_64/kernel/setup.c 2007-09-12 12:09:32.000000000 -0700
> @@ -507,6 +507,32 @@
> }
> #endif
>
> +/*[39:8] */
> +/* why not using 0xfe000000 ? */
> +#define FAM10H_PCI_MMIO_BASE 0xc0000000
> +static void fam10h_check_enable_mmcfg(struct cpuinfo_x86 *c)
> +{
> + u32 low, high, address;
> +
> + address = 0xc0010058;
> + if (rdmsr_safe(address, &low, &high))
> + return;
> +
> + if (low & 1)
> + return;
> +
> + printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");
> + /*
> + * if it is not enable, let enable it and assume only one segement
> + * with 256 buses
> + */
> + low &= ~(0xfff00000 | (0xf<<2));
> + low |= (8<<2) | (1<<0);
> + high &= ~(0x0000ffff);
> + high |= (FAM10H_PCI_MMIO_BASE>>(32-8));
> + wrmsr_safe(address, low, high);
> +}
> +
> /*
> * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
> * Assumes number of cores is a power of two.
> @@ -655,6 +681,9 @@
> /* Family 10 doesn't support C states in MWAIT so don't use it */
> if (c->x86 == 0x10 && !force_mwait)
> clear_bit(X86_FEATURE_MWAIT, &c->x86_capability);
> +
> + if (c->x86 == 0x10)
> + fam10h_check_enable_mmcfg(c);
> }
>
> static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
fixes:
--- a/arch/x86_64/kernel/setup.c~x86_64-check-and-enable-mmconfig-for-amd-family-10h-opteron-fix
+++ a/arch/x86_64/kernel/setup.c
@@ -494,7 +494,7 @@ static int nearby_node(int apicid)
/*[39:8] */
/* why not using 0xfe000000 ? */
#define FAM10H_PCI_MMIO_BASE 0xc0000000
-static void fam10h_check_enable_mmcfg(struct cpuinfo_x86 *c)
+static void __cpuinit fam10h_check_enable_mmcfg(struct cpuinfo_x86 *c)
{
u32 low, high, address;
@@ -507,8 +507,8 @@ static void fam10h_check_enable_mmcfg(st
printk(KERN_INFO "Enable MMCONFIG on AMD Family 10h\n");
/*
- * if it is not enable, let enable it and assume only one segement
- * with 256 buses
+ * If it is not enabled, enable it and assume only one segment
+ * with 256 busses.
*/
low &= ~(0xfff00000 | (0xf<<2));
low |= (8<<2) | (1<<0);
_
^ permalink raw reply [flat|nested] 2+ messages in thread
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