From: Jarek Poplawski <jarkao2@o2.pl>
To: Nick Piggin <npiggin@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>,
Helge Hafting <helge.hafting@aitel.hist.no>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Andi Kleen <ak@suse.de>
Subject: Re: [rfc][patch 3/3] x86: optimise barriers
Date: Mon, 15 Oct 2007 11:10:00 +0200 [thread overview]
Message-ID: <20071015090959.GB1875@ff.dom.local> (raw)
In-Reply-To: <20071015080924.GA32562@wotan.suse.de>
On Mon, Oct 15, 2007 at 10:09:24AM +0200, Nick Piggin wrote:
...
> Has performance really been much problem for you? (even before the
> lfence instruction, when you theoretically had to use a locked op)?
> I mean, I'd struggle to find a place in the Linux kernel where there
> is actually a measurable difference anywhere... and we're pretty
> performance critical and I think we have a reasonable amount of lockless
> code (I guess we may not have a lot of tight computational loops, though).
> I'd be interested to know what, if any, application had found these
> barriers to be problematic...
I'm not performance-words at all, so I can't help you, sorry. But, I
understand people who care about this, and think there is a popular
conviction barriers and locked instructions are costly, so I'm
surprised there is any "problem" now with finding these gains...
> The thing is that those documents are not defining what a particular
> implementation does, but how the architecture is defined (ie. what
> must some arbitrary software/hardware provide and what may it expect).
I'm not sure this is the right way to tell it. If there is no
distinction between what is and what could be, how can I believe in
similar Alpha or Itanium stuff? IMHO, these manuals sometimes look
like they describe some real hardware mechanisms, and sometimes they
mention about possible changes and reserved features too. So, when
they don't mention you could think it's a present behavior.
> It's pretty natural that Intel started out with a weaker guarantee
> than their CPUs of the time actually supported, and tightened it up
> after (presumably) deciding not to implement such relaxed semantics
> for the forseeable future.
As a matter of fact it's not natural for me at all. I expected the
other direction, and I still doubt programmers' intentions could be
"automatically" predicted good enough, so IMHO, it's not for long.
Of course, it doesn't seem to be any help for linux or bsd
programmers, which still have to think about different architectures.
Regards,
Jarek P.
next prev parent reply other threads:[~2007-10-15 9:07 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-04 5:21 [rfc][patch 1/3] x86_64: fence nontemproal stores Nick Piggin
2007-10-04 5:22 ` [rfc][patch 2/3] x86: fix IO write barriers Nick Piggin
2007-10-04 17:32 ` Dave Jones
2007-10-04 17:53 ` Andi Kleen
2007-10-04 18:10 ` Dave Jones
2007-10-04 18:21 ` Andi Kleen
2007-10-04 18:41 ` Dave Jones
2007-10-04 18:58 ` Andi Kleen
2007-10-04 19:08 ` Dave Jones
2007-10-04 20:52 ` Alan Cox
2007-10-04 5:23 ` [rfc][patch 3/3] x86: optimise barriers Nick Piggin
2007-10-12 8:25 ` Jarek Poplawski
2007-10-12 8:42 ` Helge Hafting
2007-10-12 9:12 ` Jarek Poplawski
2007-10-12 9:44 ` Nick Piggin
2007-10-12 10:04 ` Jarek Poplawski
2007-10-12 12:44 ` Helge Hafting
2007-10-12 13:29 ` Jarek Poplawski
2007-10-15 10:17 ` Helge Hafting
2007-10-15 11:53 ` Jarek Poplawski
2007-10-12 8:57 ` Nick Piggin
2007-10-12 9:55 ` Jarek Poplawski
2007-10-12 10:42 ` Nick Piggin
2007-10-12 11:55 ` Jarek Poplawski
2007-10-12 12:10 ` Jarek Poplawski
2007-10-12 15:13 ` Linus Torvalds
2007-10-15 7:44 ` Jarek Poplawski
2007-10-15 8:09 ` Nick Piggin
2007-10-15 9:10 ` Jarek Poplawski [this message]
2007-10-15 9:24 ` Jarek Poplawski
2007-10-16 0:50 ` Nick Piggin
2007-10-16 9:00 ` Jarek Poplawski
2007-10-16 9:14 ` david
2007-10-16 12:49 ` Jarek Poplawski
2007-10-15 14:38 ` David Schwartz
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