* [PATCH 2.6.23] oProfile: op_model_athalon.c support for AMD Family10h (Barcelona) Performance Counters
@ 2007-10-15 17:00 Barry Kasindorf
2007-10-15 17:48 ` Robert Richter
0 siblings, 1 reply; 3+ messages in thread
From: Barry Kasindorf @ 2007-10-15 17:00 UTC (permalink / raw)
To: linux-kernel
oProfile Driver Module Patch for AMD Family10h Kernel 2.6.23
This patch is for controlling the upper 32bits of the event ctrl msrs.
This includes the upper 4 bits of the event select and the Guest Only
and Host Only bits
This patch is necessary to make Event Based Profiling work reliably on a
Family10h processor
---
op_model_athlon.c | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
---
Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
diff -Naur linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c
linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c
--- linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c 2007-10-09
16:31:38.000000000 -0400
+++ linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c 2007-10-15
11:02:39.000000000 -0400
@@ -1,6 +1,6 @@
/**
* @file op_model_athlon.h
- * athlon / K7 model-specific MSR operations
+ * athlon / K7 / K8 / Family10h model-specific MSR operations
*
* @remark Copyright 2002 OProfile authors
* @remark Read the file COPYING
@@ -31,12 +31,16 @@
#define CTRL_WRITE(l,h,msrs,c) do {wrmsr(msrs->controls[(c)].addr,
(l), (h));} while (0)
#define CTRL_SET_ACTIVE(n) (n |= (1<<22))
#define CTRL_SET_INACTIVE(n) (n &= ~(1<<22))
-#define CTRL_CLEAR(x) (x &= (1<<21))
+#define CTRL_CLEAR_LO(x) (x &= (1<<21))
+#define CTRL_CLEAR_HI(x) ( x &= 0xfffffcf0 )
#define CTRL_SET_ENABLE(val) (val |= 1<<20)
#define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16))
#define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17))
#define CTRL_SET_UM(val, m) (val |= (m << 8))
-#define CTRL_SET_EVENT(val, e) (val |= e)
+#define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff))
+#define CTRL_SET_EVENT_HIGH(val,e) (val |= ((e >> 8) & 0xf))
+#define CTRL_SET_HOST_ONLY(val, h) (val |= ((h & 1) << 9))
+#define CTRL_SET_GUEST_ONLY(val, h) (val |= ((h & 1) << 8))
static unsigned long reset_value[NUM_COUNTERS];
@@ -70,7 +74,8 @@
if (unlikely(!CTRL_IS_RESERVED(msrs,i)))
continue;
CTRL_READ(low, high, msrs, i);
- CTRL_CLEAR(low);
+ CTRL_CLEAR_LO(low);
+ CTRL_CLEAR_HI(low);
CTRL_WRITE(low, high, msrs, i);
}
@@ -89,12 +94,17 @@
CTR_WRITE(counter_config[i].count, msrs, i);
CTRL_READ(low, high, msrs, i);
- CTRL_CLEAR(low);
+ CTRL_CLEAR_LO(low);
+ CTRL_CLEAR_HI(high);
CTRL_SET_ENABLE(low);
CTRL_SET_USR(low, counter_config[i].user);
CTRL_SET_KERN(low, counter_config[i].kernel);
CTRL_SET_UM(low, counter_config[i].unit_mask);
- CTRL_SET_EVENT(low, counter_config[i].event);
+ CTRL_SET_EVENT_LOW(low, counter_config[i].event);
+ CTRL_SET_EVENT_HIGH(high, counter_config[i].event);
+ CTRL_SET_HOST_ONLY(high, 0);
+ CTRL_SET_GUEST_ONLY(high, 0);
+
CTRL_WRITE(low, high, msrs, i);
} else {
reset_value[i] = 0;
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH 2.6.23] oProfile: op_model_athalon.c support for AMD Family10h (Barcelona) Performance Counters 2007-10-15 17:00 [PATCH 2.6.23] oProfile: op_model_athalon.c support for AMD Family10h (Barcelona) Performance Counters Barry Kasindorf @ 2007-10-15 17:48 ` Robert Richter 2007-10-15 18:07 ` Barry Kasindorf 0 siblings, 1 reply; 3+ messages in thread From: Robert Richter @ 2007-10-15 17:48 UTC (permalink / raw) To: Barry Kasindorf; +Cc: linux-kernel On 15.10.07 13:00:27, Barry Kasindorf wrote: > > oProfile Driver Module Patch for AMD Family10h Kernel 2.6.23 > This patch is for controlling the upper 32bits of the event ctrl msrs. > This includes the upper 4 bits of the event select and the Guest Only > and Host Only bits > This patch is necessary to make Event Based Profiling work reliably on a > Family10h processor > > --- > op_model_athlon.c | 22 ++++++++++++++++------ > 1 file changed, 16 insertions(+), 6 deletions(-) > --- > > Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com> > Signed-off-by: Robert Richter <robert.richter@amd.com> > > diff -Naur linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c > linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c > --- linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c 2007-10-09 > 16:31:38.000000000 -0400 > +++ linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c 2007-10-15 > 11:02:39.000000000 -0400 [] > @@ -70,7 +74,8 @@ > if (unlikely(!CTRL_IS_RESERVED(msrs,i))) > continue; > CTRL_READ(low, high, msrs, i); > - CTRL_CLEAR(low); > + CTRL_CLEAR_LO(low); > + CTRL_CLEAR_HI(low); Should be probably this: CTRL_CLEAR_HI(high); > CTRL_WRITE(low, high, msrs, i); > } > [] -- Advanced Micro Devices, Inc. Operating System Research Center email: robert.richter@amd.com ^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 2.6.23] oProfile: op_model_athalon.c support for AMD Family10h (Barcelona) Performance Counters 2007-10-15 17:48 ` Robert Richter @ 2007-10-15 18:07 ` Barry Kasindorf 0 siblings, 0 replies; 3+ messages in thread From: Barry Kasindorf @ 2007-10-15 18:07 UTC (permalink / raw) To: Robert Richter; +Cc: linux-kernel Yes, I saw this about 3 minutes too late :-). -Barry oProfile Driver Module Patch for AMD Family10h Kernel 2.6.23 This patch is for controlling the upper 32bits of the event ctrl msrs. This includes the upper 4 bits of the event select and the Guest Only and Host Only bits This patch is necessary to make Event Based Profiling work reliably on a Family 10h processor --- op_model_athlon.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) --- Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com> diff -Naur linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c --- linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c 2007-10-09 16:31:38.000000000 -0400 +++ linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c 2007-10-15 11:02:39.000000000 -0400 @@ -1,6 +1,6 @@ /** * @file op_model_athlon.h - * athlon / K7 model-specific MSR operations + * athlon / K7 / K8 / Family 10h model-specific MSR operations * * @remark Copyright 2002 OProfile authors * @remark Read the file COPYING @@ -31,12 +31,16 @@ #define CTRL_WRITE(l,h,msrs,c) do {wrmsr(msrs->controls[(c)].addr, (l), (h));} while (0) #define CTRL_SET_ACTIVE(n) (n |= (1<<22)) #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22)) -#define CTRL_CLEAR(x) (x &= (1<<21)) +#define CTRL_CLEAR_LO(x) (x &= (1<<21)) +#define CTRL_CLEAR_HI(x) ( x &= 0xfffffcf0 ) #define CTRL_SET_ENABLE(val) (val |= 1<<20) #define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16)) #define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17)) #define CTRL_SET_UM(val, m) (val |= (m << 8)) -#define CTRL_SET_EVENT(val, e) (val |= e) +#define CTRL_SET_EVENT_LOW(val, e) (val |= (e & 0xff)) +#define CTRL_SET_EVENT_HIGH(val,e) (val |= ((e >> 8) & 0xf)) +#define CTRL_SET_HOST_ONLY(val, h) (val |= ((h & 1) << 9)) +#define CTRL_SET_GUEST_ONLY(val, h) (val |= ((h & 1) << 8)) static unsigned long reset_value[NUM_COUNTERS]; @@ -70,7 +74,8 @@ if (unlikely(!CTRL_IS_RESERVED(msrs,i))) continue; CTRL_READ(low, high, msrs, i); - CTRL_CLEAR(low); + CTRL_CLEAR_LO(low); + CTRL_CLEAR_HI(high); CTRL_WRITE(low, high, msrs, i); } @@ -89,12 +94,17 @@ CTR_WRITE(counter_config[i].count, msrs, i); CTRL_READ(low, high, msrs, i); - CTRL_CLEAR(low); + CTRL_CLEAR_LO(low); + CTRL_CLEAR_HI(high); CTRL_SET_ENABLE(low); CTRL_SET_USR(low, counter_config[i].user); CTRL_SET_KERN(low, counter_config[i].kernel); CTRL_SET_UM(low, counter_config[i].unit_mask); - CTRL_SET_EVENT(low, counter_config[i].event); + CTRL_SET_EVENT_LOW(low, counter_config[i].event); + CTRL_SET_EVENT_HIGH(high, counter_config[i].event); + CTRL_SET_HOST_ONLY(high, 0); + CTRL_SET_GUEST_ONLY(high, 0); + CTRL_WRITE(low, high, msrs, i); } else { reset_value[i] = 0; Robert Richter wrote: > On 15.10.07 13:00:27, Barry Kasindorf wrote: >> oProfile Driver Module Patch for AMD Family10h Kernel 2.6.23 >> This patch is for controlling the upper 32bits of the event ctrl msrs. >> This includes the upper 4 bits of the event select and the Guest Only >> and Host Only bits >> This patch is necessary to make Event Based Profiling work reliably on a >> Family10h processor >> >> --- >> op_model_athlon.c | 22 ++++++++++++++++------ >> 1 file changed, 16 insertions(+), 6 deletions(-) >> --- >> >> Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com> >> Signed-off-by: Robert Richter <robert.richter@amd.com> >> >> diff -Naur linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c >> linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c >> --- linux-2.6.23.orig/arch/i386/oprofile/op_model_athlon.c 2007-10-09 >> 16:31:38.000000000 -0400 >> +++ linux-2.6.23.pmc/arch/i386/oprofile/op_model_athlon.c 2007-10-15 >> 11:02:39.000000000 -0400 > > [] > >> @@ -70,7 +74,8 @@ >> if (unlikely(!CTRL_IS_RESERVED(msrs,i))) >> continue; >> CTRL_READ(low, high, msrs, i); >> - CTRL_CLEAR(low); >> + CTRL_CLEAR_LO(low); >> + CTRL_CLEAR_HI(low); > > Should be probably this: > > CTRL_CLEAR_HI(high); > >> CTRL_WRITE(low, high, msrs, i); >> } >> > > [] > ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2007-10-15 18:07 UTC | newest] Thread overview: 3+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2007-10-15 17:00 [PATCH 2.6.23] oProfile: op_model_athalon.c support for AMD Family10h (Barcelona) Performance Counters Barry Kasindorf 2007-10-15 17:48 ` Robert Richter 2007-10-15 18:07 ` Barry Kasindorf
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