Re: LFENCE instruction (was: [rfc][patch 3/3] x86: optimise barriers)

Mikulas Patocka
2007-10-16T10:18:08Z

On Mon, 15 Oct 2007, H. Peter Anvin wrote:

> Mikulas Patocka wrote:
> >
> > I know about unordered stores (movnti & similar) --- they basically use
> > write-combining method on memory that is normally write-back --- and they
> > need sfence. But which one instruction does unordered load and needs
> > lefence?
> >
>
> PREFETCHNTA.

PREFETCH* doesn't change program semantics. The processor is allowed to
ignore prefetch instruction if it doesn't have resources needed for
prefetch. It not ordered wrt. fences.

PREFETCHNTA was implemented as prefetch into L1 cache and omitting L2
cache on Pentium 3 and M --- and it is implemented as prefetch into L2
cache on other --- do it doesn't really use any special buffers.

Mikulas

> -hpa
>