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From: David Brownell <david-b@pacbell.net>
To: bryan.wu@analog.com
Cc: spi-devel-general@lists.sourceforge.net,
	linux-kernel@vger.kernel.org,
	Sonic Zhang <sonic.zhang@analog.com>
Subject: Re: [PATCH 09/14] Blackfin SPI driver: Fix SPI driver to work with SPI flash ST25P16 on bf548
Date: Wed, 31 Oct 2007 01:02:36 -0700	[thread overview]
Message-ID: <200710310102.36542.david-b@pacbell.net> (raw)
In-Reply-To: <1193816110.6971.50.camel@roc-laptop>

On Wednesday 31 October 2007, Bryan Wu wrote:
> IMO, the spi_transfer.speed_hz <= spi_board_info.max_speed_hz and if
> spi_trasnfer.speed_hz is 0, we should use spi_board_info.max_speed_hz.
> From the meaning of max_speed_hz, the spi_transfer.speed_hz should not
> beyond max_speed_hz.

According to the interface spec that's not how it works; so I'm
not sure what you base your opinion on.  It's not defined with
such constraints.

That might be a reasonable policy to adopt in many cases, and
nothing prevents any given protocol driver from choosing to follow
it.  But likewise, if the driver chooses _not_ to follow it, it's
wrong for a controller driver to add its own private rules.


> In your explanation, the max_speed_hz is just a default value. the
> transfer speed_hz can beyond max_speed_hz.

Kerneldoc for board info says;

 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
 *      from the chip datasheet and board-specific signal quality issues.

So yes -- initial value, it can be changed.  If a driver says

	spi->max_speed_hz = X;
	spi_setup(spi);

that's how it requests a different clock rate ceiling.  It can lower
the rate; it can raise it.


The reason it's called max_speed_hz is that most systems compute the
clock rate by dividing a base clock, and few can achieve that exact
value.  The name indicates that it's to be treated as an upper limit,
not a lower limit or exact value.  The controller driver should get
as close to that rate as it can, without going over.


> We found the bug in M25P16 
> should be related this missing checking of the transfer  speed_hz.

The m25p80 driver doesn't change that value...

So if there was any issue there, it must have been related to
something else in your controller driver.

- Dave

  reply	other threads:[~2007-10-31  8:02 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-10-30  9:17 [PATCH 00/14] Blackfin on-chip SPI controller driver updates and bug-fixing Bryan Wu
2007-10-30  9:17 ` [PATCH 01/14] Blackfin SPI driver: Initial supporting BF54x in SPI driver Bryan Wu
2007-10-30  9:17 ` [PATCH 02/14] Blackfin SPI driver: use new GPIO API and add error handling Bryan Wu
2007-10-30  9:17 ` [PATCH 03/14] Blackfin SPI driver: add error handing Bryan Wu
2007-10-30  9:17 ` [PATCH 04/14] Blackfin SPI driver: Blackfin SPI driver does not respect the per-transfer cs_change field Bryan Wu
2007-10-30  9:17 ` [PATCH 05/14] Blackfin SPI driver: prevent people from setting bits in ctl_reg Bryan Wu
2007-10-30  9:17 ` [PATCH 06/14] Blackfin SPI driver: update spi driver to support multi-ports Bryan Wu
2007-10-30  9:17 ` [PATCH 07/14] Blackfin SPI driver: Add SPI master controller platform device 1 Bryan Wu
2007-10-30 19:08   ` David Brownell
2007-10-31  4:18     ` Bryan Wu
2007-10-30  9:17 ` [PATCH 08/14] Blackfin SPI driver: Move GPIO config to setup and cleanup Bryan Wu
2007-10-30  9:18 ` [PATCH 09/14] Blackfin SPI driver: Fix SPI driver to work with SPI flash ST25P16 on bf548 Bryan Wu
2007-10-30 20:05   ` David Brownell
2007-10-31  6:50     ` Bryan Wu
2007-10-31  7:11       ` David Brownell
2007-10-31  7:35         ` Bryan Wu
2007-10-31  8:02           ` David Brownell [this message]
2007-10-31  8:52             ` Bryan Wu
2007-10-31  8:33         ` Mike Frysinger
2007-10-31 19:01           ` David Brownell
2007-10-31 19:16             ` Mike Frysinger
2007-10-31 20:14               ` David Brownell
2007-10-30  9:18 ` [PATCH 10/14] Blackfin SPI driver: Clean up useless wait in bfin SPI driver Bryan Wu
2007-10-30  9:18 ` [PATCH 11/14] Blackfin SPI driver: Move global SPI regs_base and dma_ch to struct driver_data Bryan Wu
2007-10-30  9:18 ` [PATCH 12/14] Blackfin SPI driver: Fix bug in u16_cs_chg_reader to read data_len-2 bytes data firstly, then read out the last 2 bytes data Bryan Wu
2007-10-30  9:18 ` [PATCH 13/14] Blackfin SPI driver: Move cs_chg_udelay to cs_deactive to fix bug when some SPI LCD driver needs delay after cs_deactive Bryan Wu
2007-10-30 20:18   ` David Brownell
2007-10-31  6:30     ` Bryan Wu
2007-10-31 19:04       ` Cameron Barfield
2007-10-30  9:18 ` [PATCH 14/14] Blackfin SPI driver: set correct baud for spi mmc and enable SPI after DMA Bryan Wu
2007-10-30 20:24 ` [PATCH 00/14] Blackfin on-chip SPI controller driver updates and bug-fixing David Brownell
2007-10-30 20:29   ` Mike Frysinger
2007-10-30 20:42     ` David Brownell
2007-10-30 20:54       ` David Brownell

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