Re: [patch 5/8] Immediate Values - x86 Optimization (update)

Mathieu Desnoyers
2007-11-14T00:34:23Z

* H. Peter Anvin (hpa@zytor.com) wrote:
> Mathieu Desnoyers wrote:
>> Andi seemed to trust gas stability and you answered:
>> "The comment was referring to x86-64, but I incorrectly remembered that
>> applying to "movq $imm,%reg" as opposed to loading from an absolute
>> address. gas actually has a special opcode (movabs) for the 64-bit
>> version of the latter variant, which is only available with %rax and its
>> subregisters.
>> Nevermind, in other words. It's still true, though, that the immediate
>> will always be the last thing in the instruction -- that's a fixture of
>> the instruction format."
>> So, in the end, is there a way to make x86_64 use a fixed-size opcode
>> for the 1, 2, 4 and 8 bytes load immediates or we will have to force the
>> use of a specific register ?
>> (and we can't take a pointer from the end of the instruction, because we
>> need to align the immediate value correctly)
>
> For a 64-bit load, you'll always have a REX prefix. For 8-, 16- and 32-bit
> load, the length of the instruction will depend on the register chosen,
> unless you constrain to either all legacy or all upper registers, or you
> force gas to generate a prefix, but I don't think there is a way to do that
> that will work with assemblers all the way back to 2.12, which is at least
> what we officially support (I have no idea if assemblers that far back
> actually *work*, mind you.)
>
> -hpa

Ok, so the most flexible solution that I see, that should fit for both
i386 and x86_64 would be :

1 byte : "=Q" : Any register accessible as rh: a, b, c, and d.
2, 4 bytes : "=R" : Legacy register—the eight integer registers available
on all i386 processors (a, b, c, d, si, di, bp, sp).
8 bytes : (only for x86_64)
"=r" : A register operand is allowed provided that it is in a
general register.

That should make sure x86_64 won't try to use REX prefixed opcodes for
1, 2 and 4 bytes values.

Does it make sense ?

Mathieu