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* [PATCH 2/5] x86: c_p_a clflush_cache_range fix
@ 2008-01-31  7:36 Huang, Ying
  2008-01-31  7:40 ` Andi Kleen
  0 siblings, 1 reply; 4+ messages in thread
From: Huang, Ying @ 2008-01-31  7:36 UTC (permalink / raw)
  To: Ingo Molnar, H. Peter Anvin, Thomas Gleixner, Andi Kleen; +Cc: linux-kernel

Because in i386 early boot stage, boot_cpu_data may be not available,
which makes clflush_cach_range() into infinite loop, which is called
by change_page_attr(). This patch fixes this by providing a default
clflush_size of 64. But the better method may be providing a
early_identify_cpu() for i386.

Signed-off-by: Huang Ying <ying.huang@intel.com>

---
 arch/x86/mm/pageattr.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -36,11 +36,14 @@ within(unsigned long addr, unsigned long
  */
 void clflush_cache_range(void *vaddr, unsigned int size)
 {
+	int clflush_size;
 	void *vend = vaddr + size - 1;
 
 	mb();
 
-	for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
+	/* In boot stage, boot_cpu_data may be not available */
+	clflush_size = boot_cpu_data.x86_clflush_size ? : 64;
+	for (; vaddr < vend; vaddr += clflush_size)
 		clflush(vaddr);
 	/*
 	 * Flush any possible final partial cacheline:


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 2/5] x86: c_p_a clflush_cache_range fix
  2008-01-31  7:36 [PATCH 2/5] x86: c_p_a clflush_cache_range fix Huang, Ying
@ 2008-01-31  7:40 ` Andi Kleen
  2008-01-31  8:27   ` Huang, Ying
  0 siblings, 1 reply; 4+ messages in thread
From: Andi Kleen @ 2008-01-31  7:40 UTC (permalink / raw)
  To: Huang, Ying; +Cc: Ingo Molnar, H. Peter Anvin, Thomas Gleixner, linux-kernel

On Thursday 31 January 2008 08:36:02 Huang, Ying wrote:
> Because in i386 early boot stage, boot_cpu_data may be not available,
> which makes clflush_cach_range() into infinite loop, which is called
> by change_page_attr(). This patch fixes this by providing a default
> clflush_size of 64. But the better method may be providing a
> early_identify_cpu() for i386.

There already is one. arch/x86/kernel/cpu/common.c:early_cpu_detect 
Just set it to 64 there.

-Andi


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 2/5] x86: c_p_a clflush_cache_range fix
  2008-01-31  7:40 ` Andi Kleen
@ 2008-01-31  8:27   ` Huang, Ying
  2008-01-31 12:08     ` Ingo Molnar
  0 siblings, 1 reply; 4+ messages in thread
From: Huang, Ying @ 2008-01-31  8:27 UTC (permalink / raw)
  To: Andi Kleen; +Cc: Ingo Molnar, H. Peter Anvin, Thomas Gleixner, linux-kernel

On Thu, 2008-01-31 at 08:40 +0100, Andi Kleen wrote:
> On Thursday 31 January 2008 08:36:02 Huang, Ying wrote:
> > Because in i386 early boot stage, boot_cpu_data may be not available,
> > which makes clflush_cach_range() into infinite loop, which is called
> > by change_page_attr(). This patch fixes this by providing a default
> > clflush_size of 64. But the better method may be providing a
> > early_identify_cpu() for i386.
> 
> There already is one. arch/x86/kernel/cpu/common.c:early_cpu_detect 
> Just set it to 64 there.

Thanks. The following is a new patch based on your reminding.

--------------------------------------------------------------------

Because in i386 early boot stage, boot_cpu_data may be not available,
which makes clflush_cach_range() into infinite loop, which is called
by change_page_attr(). This patch fixes this by setting
boot_cpu_data.x86_clflush_size in early_cpu_detect().

Signed-off-by: Huang Ying <ying.huang@intel.com>

---
 arch/x86/kernel/cpu/common.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -274,8 +274,10 @@ void __init cpu_detect(struct cpuinfo_x8
 		if (c->x86 >= 0x6)
 			c->x86_model += ((tfms >> 16) & 0xF) << 4;
 		c->x86_mask = tfms & 15;
-		if (cap0 & (1<<19))
+		if (cap0 & (1<<19)) {
 			c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
+			c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
+		}
 	}
 }
 static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
@@ -317,6 +319,7 @@ static void __init early_cpu_detect(void
 	struct cpuinfo_x86 *c = &boot_cpu_data;
 
 	c->x86_cache_alignment = 32;
+	c->x86_clflush_size = 32;
 
 	if (!have_cpuid_p())
 		return;


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH 2/5] x86: c_p_a clflush_cache_range fix
  2008-01-31  8:27   ` Huang, Ying
@ 2008-01-31 12:08     ` Ingo Molnar
  0 siblings, 0 replies; 4+ messages in thread
From: Ingo Molnar @ 2008-01-31 12:08 UTC (permalink / raw)
  To: Huang, Ying
  Cc: Andi Kleen, Ingo Molnar, H. Peter Anvin, Thomas Gleixner,
	linux-kernel


* Huang, Ying <ying.huang@intel.com> wrote:

> +++ b/arch/x86/kernel/cpu/common.c
> @@ -274,8 +274,10 @@ void __init cpu_detect(struct cpuinfo_x8
>  		if (c->x86 >= 0x6)
>  			c->x86_model += ((tfms >> 16) & 0xF) << 4;
>  		c->x86_mask = tfms & 15;
> -		if (cap0 & (1<<19))
> +		if (cap0 & (1<<19)) {
>  			c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
> +			c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
> +		}

thanks!

> @@ -317,6 +319,7 @@ static void __init early_cpu_detect(void
>  	struct cpuinfo_x86 *c = &boot_cpu_data;
>  
>  	c->x86_cache_alignment = 32;
> +	c->x86_clflush_size = 32;

i suspect 32 is a good lower limit (it's not a big issue to do too 
finegrained flushes, and CLFLUSH is valid with arbitrary alignment) - 
and this will be overriden with 64 later on.

	Ingo

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2008-01-31 12:08 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2008-01-31  7:36 [PATCH 2/5] x86: c_p_a clflush_cache_range fix Huang, Ying
2008-01-31  7:40 ` Andi Kleen
2008-01-31  8:27   ` Huang, Ying
2008-01-31 12:08     ` Ingo Molnar

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