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From: Ingo Molnar <mingo@elte.hu>
To: Andi Kleen <andi@firstfloor.org>
Cc: davej@codemonkey.org.uk, tglx@linutronix.de,
	linux-kernel@vger.kernel.org, "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: [PATCH] Use global TLB flushes in MTRR code
Date: Thu, 7 Feb 2008 20:13:37 +0100	[thread overview]
Message-ID: <20080207191337.GA13111@elte.hu> (raw)
In-Reply-To: <20080207190241.GA9449@basil.nowhere.org>


* Andi Kleen <andi@firstfloor.org> wrote:

> [probably stable material too]
> 
> Use global TLB flushes in MTRR code
> 
> Obviously kernel mappings should be flushed here too.

no, your patch is not needed:

>  	/* Flush all TLBs via a mov %cr3, %reg; mov %reg, %cr3 */
> -	__flush_tlb();
> +	__flush_tlb_all();

read the complete code:

        /*  Save value of CR4 and clear Page Global Enable (bit 7)  */
        if ( cpu_has_pge ) {
                cr4 = read_cr4();
                write_cr4(cr4 & ~X86_CR4_PGE);
        }

        /* Flush all TLBs via a mov %cr3, %reg; mov %reg, %cr3 */
        __flush_tlb();

first first turn off PGE and do a cr3 flush - that gets rid of all TLBs.

but even if it didnt get rid of it, the mirror image function, 
post_set(), we turn PGE back on in the cr4 _after_ we've flushed the 
TLBs via the cr3 - that will flush all TLBs again.

	Ingo

  parent reply	other threads:[~2008-02-07 19:15 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-02-07 19:02 [PATCH] Use global TLB flushes in MTRR code Andi Kleen
2008-02-07 19:08 ` Oliver Pinter
2008-02-07 19:13 ` Ingo Molnar [this message]
2008-02-07 20:03   ` Andi Kleen
2008-02-07 20:37     ` Ingo Molnar
2008-02-08 11:44       ` Andi Kleen
2008-02-09  9:40         ` Ingo Molnar
2008-02-09 11:48           ` Andi Kleen
2008-02-09 11:47             ` Ingo Molnar
2008-02-09 14:12               ` Andi Kleen

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