[PATCH 0/2] x86/pci: Renaming numa into numaq

[PATCH 0/2] x86/pci: Renaming numa into numaq

[Robert Richter]

This patch series renames numa into numaq for x86/pci code.

-Robert

--
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

[PATCH 1/2] x86/pci: renamed: numa.c -> numaq_32.c

[Robert Richter]

Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
---
 arch/x86/pci/Makefile   |    2 +-
 arch/x86/pci/numa.c     |  178 -----------------------------------------------
 arch/x86/pci/numaq_32.c |  178 +++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 179 insertions(+), 179 deletions(-)
 delete mode 100644 arch/x86/pci/numa.c
 create mode 100644 arch/x86/pci/numaq_32.c

diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index 28451f4..d49202e 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -11,7 +11,7 @@ obj-y				+= legacy.o irq.o
 
 obj-$(CONFIG_X86_VISWS)		+= visws.o
 
-obj-$(CONFIG_X86_NUMAQ)		+= numa.o
+obj-$(CONFIG_X86_NUMAQ)		+= numaq_32.o
 
 obj-y				+= common.o early.o
 obj-y				+= amd_bus.o
diff --git a/arch/x86/pci/numa.c b/arch/x86/pci/numa.c
deleted file mode 100644
index 8b5ca19..0000000
--- a/arch/x86/pci/numa.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * numa.c - Low-level PCI access for NUMA-Q machines
- */
-
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/nodemask.h>
-#include <mach_apic.h>
-#include <asm/mpspec.h>
-#include "pci.h"
-
-#define XQUAD_PORTIO_BASE 0xfe400000
-#define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
-
-#define BUS2QUAD(global) (mp_bus_id_to_node[global])
-
-#define BUS2LOCAL(global) (mp_bus_id_to_local[global])
-
-#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
-
-/* Where the IO area was mapped on multiquad, always 0 otherwise */
-void *xquad_portio;
-EXPORT_SYMBOL(xquad_portio);
-
-#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
-
-#define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
-	(0x80000000 | (BUS2LOCAL(bus) << 16) | (devfn << 8) | (reg & ~3))
-
-static void write_cf8(unsigned bus, unsigned devfn, unsigned reg)
-{
-	unsigned val = PCI_CONF1_MQ_ADDRESS(bus, devfn, reg);
-	if (xquad_portio)
-		writel(val, XQUAD_PORT_ADDR(0xcf8, BUS2QUAD(bus)));
-	else
-		outl(val, 0xCF8);
-}
-
-static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
-			     unsigned int devfn, int reg, int len, u32 *value)
-{
-	unsigned long flags;
-	void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
-
-	if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
-		return -EINVAL;
-
-	spin_lock_irqsave(&pci_config_lock, flags);
-
-	write_cf8(bus, devfn, reg);
-
-	switch (len) {
-	case 1:
-		if (xquad_portio)
-			*value = readb(adr + (reg & 3));
-		else
-			*value = inb(0xCFC + (reg & 3));
-		break;
-	case 2:
-		if (xquad_portio)
-			*value = readw(adr + (reg & 2));
-		else
-			*value = inw(0xCFC + (reg & 2));
-		break;
-	case 4:
-		if (xquad_portio)
-			*value = readl(adr);
-		else
-			*value = inl(0xCFC);
-		break;
-	}
-
-	spin_unlock_irqrestore(&pci_config_lock, flags);
-
-	return 0;
-}
-
-static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
-			      unsigned int devfn, int reg, int len, u32 value)
-{
-	unsigned long flags;
-	void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
-
-	if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) 
-		return -EINVAL;
-
-	spin_lock_irqsave(&pci_config_lock, flags);
-
-	write_cf8(bus, devfn, reg);
-
-	switch (len) {
-	case 1:
-		if (xquad_portio)
-			writeb(value, adr + (reg & 3));
-		else
-			outb((u8)value, 0xCFC + (reg & 3));
-		break;
-	case 2:
-		if (xquad_portio)
-			writew(value, adr + (reg & 2));
-		else
-			outw((u16)value, 0xCFC + (reg & 2));
-		break;
-	case 4:
-		if (xquad_portio)
-			writel(value, adr + reg);
-		else
-			outl((u32)value, 0xCFC);
-		break;
-	}
-
-	spin_unlock_irqrestore(&pci_config_lock, flags);
-
-	return 0;
-}
-
-#undef PCI_CONF1_MQ_ADDRESS
-
-static struct pci_raw_ops pci_direct_conf1_mq = {
-	.read	= pci_conf1_mq_read,
-	.write	= pci_conf1_mq_write
-};
-
-
-static void __devinit pci_fixup_i450nx(struct pci_dev *d)
-{
-	/*
-	 * i450NX -- Find and scan all secondary buses on all PXB's.
-	 */
-	int pxb, reg;
-	u8 busno, suba, subb;
-	int quad = BUS2QUAD(d->bus->number);
-
-	printk("PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
-	reg = 0xd0;
-	for(pxb=0; pxb<2; pxb++) {
-		pci_read_config_byte(d, reg++, &busno);
-		pci_read_config_byte(d, reg++, &suba);
-		pci_read_config_byte(d, reg++, &subb);
-		DBG("i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, suba, subb);
-		if (busno) {
-			/* Bus A */
-			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, busno));
-		}
-		if (suba < subb) {
-			/* Bus B */
-			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, suba+1));
-		}
-	}
-	pcibios_last_bus = -1;
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx);
-
-int __init pci_numa_init(void)
-{
-	int quad;
-
-	if (!found_numaq)
-		return 0;
-
-	raw_pci_ops = &pci_direct_conf1_mq;
-
-	if (pcibios_scanned++)
-		return 0;
-
-	pci_root_bus = pcibios_scan_root(0);
-	if (pci_root_bus)
-		pci_bus_add_devices(pci_root_bus);
-	if (num_online_nodes() > 1)
-		for_each_online_node(quad) {
-			if (quad == 0)
-				continue;
-			printk("Scanning PCI bus %d for quad %d\n", 
-				QUADLOCAL2BUS(quad,0), quad);
-			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, 0));
-		}
-	return 0;
-}
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
new file mode 100644
index 0000000..8b5ca19
--- /dev/null
+++ b/arch/x86/pci/numaq_32.c
@@ -0,0 +1,178 @@
+/*
+ * numa.c - Low-level PCI access for NUMA-Q machines
+ */
+
+#include <linux/pci.h>
+#include <linux/init.h>
+#include <linux/nodemask.h>
+#include <mach_apic.h>
+#include <asm/mpspec.h>
+#include "pci.h"
+
+#define XQUAD_PORTIO_BASE 0xfe400000
+#define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
+
+#define BUS2QUAD(global) (mp_bus_id_to_node[global])
+
+#define BUS2LOCAL(global) (mp_bus_id_to_local[global])
+
+#define QUADLOCAL2BUS(quad,local) (quad_local_to_mp_bus_id[quad][local])
+
+/* Where the IO area was mapped on multiquad, always 0 otherwise */
+void *xquad_portio;
+EXPORT_SYMBOL(xquad_portio);
+
+#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
+
+#define PCI_CONF1_MQ_ADDRESS(bus, devfn, reg) \
+	(0x80000000 | (BUS2LOCAL(bus) << 16) | (devfn << 8) | (reg & ~3))
+
+static void write_cf8(unsigned bus, unsigned devfn, unsigned reg)
+{
+	unsigned val = PCI_CONF1_MQ_ADDRESS(bus, devfn, reg);
+	if (xquad_portio)
+		writel(val, XQUAD_PORT_ADDR(0xcf8, BUS2QUAD(bus)));
+	else
+		outl(val, 0xCF8);
+}
+
+static int pci_conf1_mq_read(unsigned int seg, unsigned int bus,
+			     unsigned int devfn, int reg, int len, u32 *value)
+{
+	unsigned long flags;
+	void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
+
+	if (!value || (bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255))
+		return -EINVAL;
+
+	spin_lock_irqsave(&pci_config_lock, flags);
+
+	write_cf8(bus, devfn, reg);
+
+	switch (len) {
+	case 1:
+		if (xquad_portio)
+			*value = readb(adr + (reg & 3));
+		else
+			*value = inb(0xCFC + (reg & 3));
+		break;
+	case 2:
+		if (xquad_portio)
+			*value = readw(adr + (reg & 2));
+		else
+			*value = inw(0xCFC + (reg & 2));
+		break;
+	case 4:
+		if (xquad_portio)
+			*value = readl(adr);
+		else
+			*value = inl(0xCFC);
+		break;
+	}
+
+	spin_unlock_irqrestore(&pci_config_lock, flags);
+
+	return 0;
+}
+
+static int pci_conf1_mq_write(unsigned int seg, unsigned int bus,
+			      unsigned int devfn, int reg, int len, u32 value)
+{
+	unsigned long flags;
+	void *adr __iomem = XQUAD_PORT_ADDR(0xcfc, BUS2QUAD(bus));
+
+	if ((bus >= MAX_MP_BUSSES) || (devfn > 255) || (reg > 255)) 
+		return -EINVAL;
+
+	spin_lock_irqsave(&pci_config_lock, flags);
+
+	write_cf8(bus, devfn, reg);
+
+	switch (len) {
+	case 1:
+		if (xquad_portio)
+			writeb(value, adr + (reg & 3));
+		else
+			outb((u8)value, 0xCFC + (reg & 3));
+		break;
+	case 2:
+		if (xquad_portio)
+			writew(value, adr + (reg & 2));
+		else
+			outw((u16)value, 0xCFC + (reg & 2));
+		break;
+	case 4:
+		if (xquad_portio)
+			writel(value, adr + reg);
+		else
+			outl((u32)value, 0xCFC);
+		break;
+	}
+
+	spin_unlock_irqrestore(&pci_config_lock, flags);
+
+	return 0;
+}
+
+#undef PCI_CONF1_MQ_ADDRESS
+
+static struct pci_raw_ops pci_direct_conf1_mq = {
+	.read	= pci_conf1_mq_read,
+	.write	= pci_conf1_mq_write
+};
+
+
+static void __devinit pci_fixup_i450nx(struct pci_dev *d)
+{
+	/*
+	 * i450NX -- Find and scan all secondary buses on all PXB's.
+	 */
+	int pxb, reg;
+	u8 busno, suba, subb;
+	int quad = BUS2QUAD(d->bus->number);
+
+	printk("PCI: Searching for i450NX host bridges on %s\n", pci_name(d));
+	reg = 0xd0;
+	for(pxb=0; pxb<2; pxb++) {
+		pci_read_config_byte(d, reg++, &busno);
+		pci_read_config_byte(d, reg++, &suba);
+		pci_read_config_byte(d, reg++, &subb);
+		DBG("i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno, suba, subb);
+		if (busno) {
+			/* Bus A */
+			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, busno));
+		}
+		if (suba < subb) {
+			/* Bus B */
+			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, suba+1));
+		}
+	}
+	pcibios_last_bus = -1;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx);
+
+int __init pci_numa_init(void)
+{
+	int quad;
+
+	if (!found_numaq)
+		return 0;
+
+	raw_pci_ops = &pci_direct_conf1_mq;
+
+	if (pcibios_scanned++)
+		return 0;
+
+	pci_root_bus = pcibios_scan_root(0);
+	if (pci_root_bus)
+		pci_bus_add_devices(pci_root_bus);
+	if (num_online_nodes() > 1)
+		for_each_online_node(quad) {
+			if (quad == 0)
+				continue;
+			printk("Scanning PCI bus %d for quad %d\n", 
+				QUADLOCAL2BUS(quad,0), quad);
+			pci_scan_bus_with_sysdata(QUADLOCAL2BUS(quad, 0));
+		}
+	return 0;
+}
-- 
1.5.5.4

Re: [PATCH 1/2] x86/pci: renamed: numa.c -> numaq_32.c

[Gabor Gombas]

Hi!

On Fri, Jul 11, 2008 at 12:18:40PM +0200, Robert Richter wrote:

> --- /dev/null
> +++ b/arch/x86/pci/numaq_32.c
> @@ -0,0 +1,178 @@
> +/*
> + * numa.c - Low-level PCI access for NUMA-Q machines
> + */
> +

Either fix the filename or just drop it completely.

Gabor

-- 
     ---------------------------------------------------------
     MTA SZTAKI Computer and Automation Research Institute
                Hungarian Academy of Sciences
     ---------------------------------------------------------

Re: [PATCH 1/2] x86/pci: renamed: numa.c -> numaq_32.c

[Robert Richter]

On 11.07.08 14:30:01, Gabor Gombas wrote:
> On Fri, Jul 11, 2008 at 12:18:40PM +0200, Robert Richter wrote:
> 
> > --- /dev/null
> > +++ b/arch/x86/pci/numaq_32.c
> > @@ -0,0 +1,178 @@
> > +/*
> > + * numa.c - Low-level PCI access for NUMA-Q machines
> > + */
> > +
> 
> Either fix the filename or just drop it completely.

Next patch in this series. This is only the git-mv.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

Re: [PATCH 1/2] x86/pci: renamed: numa.c -> numaq_32.c

[Gabor Gombas]

On Fri, Jul 11, 2008 at 02:32:14PM +0200, Robert Richter wrote:

> > Either fix the filename or just drop it completely.
> 
> Next patch in this series. This is only the git-mv.

Oh, sorry, I just realized that too. But wouldn't it be better to just
omit the file name?

Gabor

-- 
     ---------------------------------------------------------
     MTA SZTAKI Computer and Automation Research Institute
                Hungarian Academy of Sciences
     ---------------------------------------------------------

Re: [PATCH 1/2] x86/pci: renamed: numa.c -> numaq_32.c

[Robert Richter]

On 11.07.08 14:34:36, Gabor Gombas wrote:
> On Fri, Jul 11, 2008 at 02:32:14PM +0200, Robert Richter wrote:
> 
> > > Either fix the filename or just drop it completely.
> > 
> > Next patch in this series. This is only the git-mv.
> 
> Oh, sorry, I just realized that too. But wouldn't it be better to just
> omit the file name?

Maybe. My only intention was to rename the files and keep the rest
including the comments as it is.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

[PATCH 2/2] x86/pci: renaming numa into numaq

[Robert Richter]

Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
---
 arch/x86/pci/legacy.c   |    2 +-
 arch/x86/pci/numaq_32.c |    4 ++--
 arch/x86/pci/pci.h      |    2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c
index 60e8caa..f405eb0 100644
--- a/arch/x86/pci/legacy.c
+++ b/arch/x86/pci/legacy.c
@@ -58,7 +58,7 @@ static int __init pci_legacy_init(void)
 int __init pci_subsys_init(void)
 {
 #ifdef CONFIG_X86_NUMAQ
-	pci_numa_init();
+	pci_numaq_init();
 #endif
 #ifdef CONFIG_ACPI
 	pci_acpi_init();
diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c
index 8b5ca19..f4b16dc 100644
--- a/arch/x86/pci/numaq_32.c
+++ b/arch/x86/pci/numaq_32.c
@@ -1,5 +1,5 @@
 /*
- * numa.c - Low-level PCI access for NUMA-Q machines
+ * numaq_32.c - Low-level PCI access for NUMA-Q machines
  */
 
 #include <linux/pci.h>
@@ -151,7 +151,7 @@ static void __devinit pci_fixup_i450nx(struct pci_dev *d)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82451NX, pci_fixup_i450nx);
 
-int __init pci_numa_init(void)
+int __init pci_numaq_init(void)
 {
 	int quad;
 
diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h
index b2270a5..36b8dd0 100644
--- a/arch/x86/pci/pci.h
+++ b/arch/x86/pci/pci.h
@@ -107,7 +107,7 @@ extern void __init dmi_check_skip_isa_align(void);
 /* some common used subsys_initcalls */
 extern int __init pci_acpi_init(void);
 extern int __init pcibios_irq_init(void);
-extern int __init pci_numa_init(void);
+extern int __init pci_numaq_init(void);
 extern int __init pcibios_init(void);
 
 /* pci-mmconfig.c */
-- 
1.5.5.4

Re: [PATCH 0/2] x86/pci: Renaming numa into numaq

[Ingo Molnar]

* Robert Richter <robert.richter@amd.com> wrote:

> This patch series renames numa into numaq for x86/pci code.

applied to tip/x86/unify-pci:

  Robert Richter (5):
       x86/pci: Removing pci-y in Makefile
       x86/pci: Changing subsystem initialization order for NUMA
       x86/pci: renamed: numa.c -> numaq_32.c
       x86/pci: renaming numa into numaq
       x86/pci: Changing subsystem init for visws

thanks Robert.

Jesse, do you give us a general Ack for this direction and these 
commits? The changes are way too intermixed with other x86 bits to be 
cleanly separable at this stage, so it would be nice if we merged this 
via the x86 tree. Find below a list of commit IDs that change 
arch/x86/pci/ - all but the last few ones are in linux-next as well.

	Ingo

3cabf37: x86/pci: Changing subsystem init for visws
e27cf3a: x86/pci: renaming numa into numaq
9314d30: x86/pci: renamed: numa.c -> numaq_32.c
060b970: x86/pci: Changing subsystem initialization order for NUMA
2510495: x86/pci: Removing pci-y in Makefile
f361a45: x86: introduce max_low_pfn_mapped for 64-bit
3a62ed7: x86/pci: fix warnings in subsys_initcall functions
3f68f7d: x86/pci merge: fixing numaq initialization
62fa572: x86, VisWS: turn into generic arch, remove leftover files
b4b8641: x86, VisWS: turn into generic arch, create include/asm-x86/visws/
5548ed1: x86, VisWS: turn into generic arch, install proper PCI quirk
31ac409: x86, VisWS: turn into generic arch, add early init quirks
22d5c67: x86, VisWS: turn into generic arch, make VisWS boot on a regular PC
8dd779b: x86/pci: removing subsys_initcall ordering dependencies
ae28d70: x86/pci: visws: renaming pcibios_init()
f4d994b: x86/pci: Makefile merge: coalescing 32 and 64 bit
d199a04: x86/pci: merge: moving mp_bus_to_node.c to amd_bus.c
42a4b42: x86/pci: mp_bus_to_node merge: moving code in amd_bus.c
8eefc66: x86/pci: Makefile merge: creating pci-y for 64 bit
8043c7b: x86/pci: Makefile merge: changing 64bit ordering
a5d4fb9: x86/pci: Makefile merge: decoupling options for mp_bus_to_node.o
0b40e84: x86/pci: Makefile merge: whitespace changes only
7fa71c0: x86/pci: Makefile merge: removing include dir flag
6d8566a: x86/pci: Makefile merge: Removing Makefile_*
9197979: x86, pci: introduce pci=ioapicreroute kernel cmdline option
a9322f6: x86, pci: introduce pci=noioapicquirk kernel cmdline option
7d5e406: generic-ipi: x86-tree merge fixes
dbb6152: x86: don't call pxm_to_node again
b755de8: x86: make dev_to_node return online node
0715650: x86: move pci_routirq declaration to pci.h
3a27dd1: x86: Move PCI IO ECS code to x86/pci
24bfdca: x86/pci: Renaming k8-bus_64.c to amd_bus.c
499f8f8: x86: rename pat_wc_enabled to pat_enabled
7058b06: x86: coding style fixes to arch/x86/pci/irq.
d49c428: x86: make generic arch support NUMAQ
831d991: x86: add PCI extended config space access for AMD Barcelona
8004dd9: x86: amd opteron TOM2 mask val fix
968cbfa: x86: make __pci_mmcfg_init static in mmconfig-shared.c

Re: [PATCH 0/2] x86/pci: Renaming numa into numaq

[Jesse Barnes]

On Friday, July 11, 2008 12:27:33 pm Ingo Molnar wrote:
> * Robert Richter <robert.richter@amd.com> wrote:
> > This patch series renames numa into numaq for x86/pci code.
>
> applied to tip/x86/unify-pci:
>
>   Robert Richter (5):
>        x86/pci: Removing pci-y in Makefile
>        x86/pci: Changing subsystem initialization order for NUMA
>        x86/pci: renamed: numa.c -> numaq_32.c
>        x86/pci: renaming numa into numaq
>        x86/pci: Changing subsystem init for visws
>
> thanks Robert.
>
> Jesse, do you give us a general Ack for this direction and these
> commits? The changes are way too intermixed with other x86 bits to be
> cleanly separable at this stage, so it would be nice if we merged this
> via the x86 tree. Find below a list of commit IDs that change
> arch/x86/pci/ - all but the last few ones are in linux-next as well.

Yeah, no problem with the general direction.  I'll re-review Robert's latest 
stuff when I get a chance, but it looked pretty good to me in the first pass.

Thanks,
Jesse