Re: [patch 23/26] x64, x2apic/intr-remap: MSI and MSI-X support for interrupt remapping infrastructure

[Suresh Siddha <suresh.b.siddha@intel.com>]

On Fri, Jul 11, 2008 at 01:59:24AM -0700, Eric W. Biederman wrote:
> What I am ultimately looking for is the x86 iommu irq mapping api.
> And how we handle irqs in the context of it.
> 
> So as a start I think we can create x86_map_irq, as I suggested.

Sure. Will probably introduce irq_mapping_ops (which may be as simple as
ops containing specific msi_compose_msg, ioapic_compose_rte, etc). This
should simiplify the setup code. I will look into this and post these patches
next week.

> Since we have the pci dev to lookup the iommu then we really shouldn't

Not all irq's in the platform will be remapped, for example, interrupts
generated by IOMMU itself are not remapped. And all irq's don't have
corresponding pci dev, like IO-APIC, MSI etc.

> need multiple irq_chip structures (although it may be worth it if we
> can detect we can optimize irq migration).

Depending on the IOMMU/hardware, they may define different irq_chip's
if they add/simplify functionality, or may  use existing irq_chip's.

thanks,
suresh