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Date: Sat, 19 Jul 2008 16:59:07 +0400
From: Cyrill Gorcunov <gorcunov@gmail.com>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Vegard Nossum <vegard.nossum@gmail.com>, Ingo Molnar <mingo@elte.hu>,
       linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86: warn on apic error
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[Maciej W. Rozycki - Fri, Jul 18, 2008 at 08:09:20PM +0100]
| On Fri, 18 Jul 2008, Cyrill Gorcunov wrote:
| 
| > iirc, they all were there (though some error codes are specific for
| > particular processor classes like P4, pentium and other - don't remeber
| > you could check intel dev manual for this).
| 
|  This is an error in some newer Intel documents -- the set of supported
| bits is the same for all APICs implementing the ESR register and the error
| interrupt (the 82489DX is the one to provide neither).
| 
|   Maciej
|

But Maciej, Intel doesn't claim about absence of bit but
rather about their 'reserved' state so checking the reserved
bit could be false alarm if it was being set by some reason.

		- Cyrill -