Re: [PATCH 2/2] x86: implement multiple queues for smp function call IPIs

[Ingo Molnar <mingo@elte.hu>]

* Jeremy Fitzhardinge <jeremy@goop.org> wrote:

> Ingo Molnar wrote:
>> Yes on the 64-bit side we've had NUM_INVALIDATE_TLB_VECTORS (==8) for a 
>> long time, but note that 64-bit is obviously for more modern CPUs. What 
>> i'm mindful about (i'm not _that_ worried) are fragile APICs and 
>> unknown erratas.
>>   
>
> Well, the whole exercise is only useful if you have a relatively large 
> number of CPUs, which presumably means you have relatively modern 
> APICs.  If we set the number of queues to 1 for < 4 CPUs, would that 
> avoid the problem APICs?

hm, but such special casing would reduce testing exposure and would also 
needlessly penalize boxes that work perfectly fine.

So ... how about my original suggestion, to add a (default-off) boot 
option that reduces the queues to 1? I.e. lets have something in place 
from day 1 on that could be quirk-handler-driven, should the need arise. 
"apic=simpleipi" or something like that.

In a year or two, once this all has proven itself fine on a broad range 
of systems, we'll laugh out loud at being so cautious and can remove the 
boot option for good ;-)

	Ingo