[patch 1/2] x2apic: use cpuid vector 0xb when available for detecting cpu topology

[patch 1/2] x2apic: use cpuid vector 0xb when available for detecting cpu topology

[Suresh Siddha]

[-- Attachment #1: cpuid_vector_b.patch --]
[-- Type: text/plain, Size: 6157 bytes --]

cpuid leaf 0xb provides extended topology enumeration. This interface provides
the 32-bit x2APIC id of the logical processor and it also provides a new
mechanism to detect SMT and core siblings (which provides increased
addressability).

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---

Index: tip/arch/x86/kernel/cpu/addon_cpuid_features.c
===================================================================
--- tip.orig/arch/x86/kernel/cpu/addon_cpuid_features.c	2008-08-18 10:10:06.000000000 -0700
+++ tip/arch/x86/kernel/cpu/addon_cpuid_features.c	2008-08-18 10:39:41.000000000 -0700
@@ -7,6 +7,8 @@
 #include <asm/pat.h>
 #include <asm/processor.h>
 
+#include <mach_apic.h>
+
 struct cpuid_bit {
 	u16 feature;
 	u8 reg;
@@ -48,6 +50,90 @@
 	}
 }
 
+/* leaf 0xb SMT level */
+#define SMT_LEVEL	0
+
+/* leaf 0xb sub-leaf types */
+#define INVALID_TYPE	0
+#define SMT_TYPE	1
+#define CORE_TYPE	2
+
+#define LEAFB_SUBTYPE(ecx)		(((ecx) >> 8) & 0xff)
+#define BITS_SHIFT_NEXT_LEVEL(eax)	((eax) & 0x1f)
+#define LEVEL_MAX_SIBLINGS(ebx)		((ebx) & 0xffff)
+
+/*
+ * Check for extended topology enumeration cpuid leaf 0xb and if it
+ * exists, use it for populating initial_apicid and cpu topology
+ * detection.
+ */
+void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
+{
+	unsigned int eax, ebx, ecx, edx, sub_index;
+	unsigned int ht_mask_width, core_plus_mask_width;
+	unsigned int core_select_mask, core_level_siblings;
+
+	if (c->cpuid_level < 0xb)
+		return;
+
+	cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
+
+	/*
+	 * check if the cpuid leaf 0xb is actually implemented.
+	 */
+	if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
+		return;
+
+	set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
+
+	/*
+	 * initial apic id, which also represents 32-bit extended x2apic id.
+	 */
+	c->initial_apicid = edx;
+
+	/*
+	 * Populate HT related information from sub-leaf level 0.
+	 */
+	core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
+	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+
+	sub_index = 1;
+	do {
+		cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
+
+		/*
+		 * Check for the Core type in the implemented sub leaves.
+		 */
+		if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
+			core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
+			core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
+			break;
+		}
+
+		sub_index++;
+	} while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
+
+	core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
+
+#ifdef CONFIG_X86_32
+	c->cpu_core_id = phys_pkg_id(c->initial_apicid, ht_mask_width)
+						 & core_select_mask;
+	c->phys_proc_id = phys_pkg_id(c->initial_apicid, core_plus_mask_width);
+#else
+	c->cpu_core_id = phys_pkg_id(ht_mask_width) & core_select_mask;
+	c->phys_proc_id = phys_pkg_id(core_plus_mask_width);
+#endif
+	c->x86_max_cores = (core_level_siblings / smp_num_siblings);
+
+
+	printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
+	       c->phys_proc_id);
+	if (c->x86_max_cores > 1)
+		printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
+		       c->cpu_core_id);
+	return;
+}
+
 #ifdef CONFIG_X86_PAT
 void __cpuinit validate_pat_support(struct cpuinfo_x86 *c)
 {
Index: tip/arch/x86/kernel/cpu/common_64.c
===================================================================
--- tip.orig/arch/x86/kernel/cpu/common_64.c	2008-08-18 10:10:06.000000000 -0700
+++ tip/arch/x86/kernel/cpu/common_64.c	2008-08-18 10:11:00.000000000 -0700
@@ -127,6 +127,9 @@
 	u32 eax, ebx, ecx, edx;
 	int index_msb, core_bits;
 
+	if (cpu_has(c, X86_FEATURE_XTOPOLOGY))
+		return;
+
 	cpuid(1, &eax, &ebx, &ecx, &edx);
 
 
Index: tip/arch/x86/kernel/cpu/intel_64.c
===================================================================
--- tip.orig/arch/x86/kernel/cpu/intel_64.c	2008-08-18 10:10:06.000000000 -0700
+++ tip/arch/x86/kernel/cpu/intel_64.c	2008-08-18 10:11:00.000000000 -0700
@@ -80,7 +80,10 @@
 	if (c->x86 == 6)
 		set_cpu_cap(c, X86_FEATURE_REP_GOOD);
 	set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);
-	c->x86_max_cores = intel_num_cpu_cores(c);
+
+	detect_extended_topology(c);
+	if (!cpu_has(c, X86_FEATURE_XTOPOLOGY))
+		c->x86_max_cores = intel_num_cpu_cores(c);
 
 	srat_detect_node();
 }
Index: tip/include/asm-x86/cpufeature.h
===================================================================
--- tip.orig/include/asm-x86/cpufeature.h	2008-08-18 10:10:06.000000000 -0700
+++ tip/include/asm-x86/cpufeature.h	2008-08-18 10:38:44.000000000 -0700
@@ -80,6 +80,7 @@
 #define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */
 #define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
 #define X86_FEATURE_11AP	(3*32+19)  /* Bad local APIC aka 11AP */
+#define X86_FEATURE_XTOPOLOGY    (3*32+20) /* cpu topology enum extensions */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3	(4*32+ 0) /* Streaming SIMD Extensions-3 */
Index: tip/include/asm-x86/processor.h
===================================================================
--- tip.orig/include/asm-x86/processor.h	2008-08-18 10:10:06.000000000 -0700
+++ tip/include/asm-x86/processor.h	2008-08-18 10:11:00.000000000 -0700
@@ -166,6 +166,7 @@
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
 extern unsigned short num_cache_leaves;
 
+extern void detect_extended_topology(struct cpuinfo_x86 *c);
 #if defined(CONFIG_X86_HT) || defined(CONFIG_X86_64)
 extern void detect_ht(struct cpuinfo_x86 *c);
 #else
Index: tip/arch/x86/kernel/cpu/intel.c
===================================================================
--- tip.orig/arch/x86/kernel/cpu/intel.c	2008-08-18 10:10:06.000000000 -0700
+++ tip/arch/x86/kernel/cpu/intel.c	2008-08-18 10:11:00.000000000 -0700
@@ -183,9 +183,16 @@
 	if (p)
 		strcpy(c->x86_model_id, p);
 
-	c->x86_max_cores = num_cpu_cores(c);
+	detect_extended_topology(c);
 
-	detect_ht(c);
+	if (!cpu_has(c, X86_FEATURE_XTOPOLOGY)) {
+		/*
+		 * let's use the legacy cpuid vector 0x1 and 0x4 for topology
+		 * detection.
+		 */
+		c->x86_max_cores = num_cpu_cores(c);
+		detect_ht(c);
+	}
 
 	/* Work around errata */
 	Intel_errata_workarounds(c);

-- 

[patch 2/2] x2apic: use x2apic id reported by cpuid during topology discovery

[Suresh Siddha]

[-- Attachment #1: use_initial_apicid_x2apic.patch --]
[-- Type: text/plain, Size: 1716 bytes --]

use x2apic id reported by cpuid during topology discovery, instead of the
apic id configured in the APIC. For most of the systems, x2apic id
reported by cpuid leaf 0xb will be same as the physical apic id reported
by the APIC_ID register of the APIC. We follow the suggested guidelines
and use the apic id reported by the cpuid.

No change to non-generic UV platforms, will use the apic id reported in the
APIC_ID register as the cpuid reported apic id's may not be unique.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---


Index: tip/arch/x86/kernel/genx2apic_cluster.c
===================================================================
--- tip.orig/arch/x86/kernel/genx2apic_cluster.c	2008-08-14 15:20:43.000000000 -0700
+++ tip/arch/x86/kernel/genx2apic_cluster.c	2008-08-14 15:21:48.000000000 -0700
@@ -120,14 +120,9 @@
 	return x;
 }
 
-static unsigned int x2apic_read_id(void)
-{
-	return apic_read(APIC_ID);
-}
-
 static unsigned int phys_pkg_id(int index_msb)
 {
-	return x2apic_read_id() >> index_msb;
+	return current_cpu_data.initial_apicid >> index_msb;
 }
 
 static void x2apic_send_IPI_self(int vector)
Index: tip/arch/x86/kernel/genx2apic_phys.c
===================================================================
--- tip.orig/arch/x86/kernel/genx2apic_phys.c	2008-08-14 15:20:43.000000000 -0700
+++ tip/arch/x86/kernel/genx2apic_phys.c	2008-08-14 15:21:48.000000000 -0700
@@ -118,14 +118,9 @@
 	return x;
 }
 
-static unsigned int x2apic_read_id(void)
-{
-	return apic_read(APIC_ID);
-}
-
 static unsigned int phys_pkg_id(int index_msb)
 {
-	return x2apic_read_id() >> index_msb;
+	return current_cpu_data.initial_apicid >> index_msb;
 }
 
 void x2apic_send_IPI_self(int vector)

-- 

Re: [patch 2/2] x2apic: use x2apic id reported by cpuid during topology discovery

[Ingo Molnar]

* Suresh Siddha <suresh.b.siddha@intel.com> wrote:

> use x2apic id reported by cpuid during topology discovery, instead of the
> apic id configured in the APIC. For most of the systems, x2apic id
> reported by cpuid leaf 0xb will be same as the physical apic id reported
> by the APIC_ID register of the APIC. We follow the suggested guidelines
> and use the apic id reported by the cpuid.
> 
> No change to non-generic UV platforms, will use the apic id reported in the
> APIC_ID register as the cpuid reported apic id's may not be unique.
> 
> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>

applied both fixes to tip/x86/x2apic - thanks Suresh!

	Ingo

[patch 2/2] x2apic: use x2apic id reported by cpuid during topology discovery

[Suresh Siddha]

[-- Attachment #1: use_initial_apicid_x2apic.patch --]
[-- Type: text/plain, Size: 1716 bytes --]

use x2apic id reported by cpuid during topology discovery, instead of the
apic id configured in the APIC. For most of the systems, x2apic id
reported by cpuid leaf 0xb will be same as the physical apic id reported
by the APIC_ID register of the APIC. We follow the suggested guidelines
and use the apic id reported by the cpuid.

No change to non-generic UV platforms, will use the apic id reported in the
APIC_ID register as the cpuid reported apic id's may not be unique.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---


Index: tip/arch/x86/kernel/genx2apic_cluster.c
===================================================================
--- tip.orig/arch/x86/kernel/genx2apic_cluster.c	2008-08-25 11:25:47.000000000 -0700
+++ tip/arch/x86/kernel/genx2apic_cluster.c	2008-08-25 13:15:45.000000000 -0700
@@ -120,14 +120,9 @@
 	return x;
 }
 
-static unsigned int x2apic_read_id(void)
-{
-	return apic_read(APIC_ID);
-}
-
 static unsigned int phys_pkg_id(int index_msb)
 {
-	return x2apic_read_id() >> index_msb;
+	return current_cpu_data.initial_apicid >> index_msb;
 }
 
 static void x2apic_send_IPI_self(int vector)
Index: tip/arch/x86/kernel/genx2apic_phys.c
===================================================================
--- tip.orig/arch/x86/kernel/genx2apic_phys.c	2008-08-25 11:25:47.000000000 -0700
+++ tip/arch/x86/kernel/genx2apic_phys.c	2008-08-25 13:15:45.000000000 -0700
@@ -118,14 +118,9 @@
 	return x;
 }
 
-static unsigned int x2apic_read_id(void)
-{
-	return apic_read(APIC_ID);
-}
-
 static unsigned int phys_pkg_id(int index_msb)
 {
-	return x2apic_read_id() >> index_msb;
+	return current_cpu_data.initial_apicid >> index_msb;
 }
 
 void x2apic_send_IPI_self(int vector)

-- 

Re: [patch 2/2] x2apic: use x2apic id reported by cpuid during topology discovery

[Ingo Molnar]

applied the delta patch below to tip/x86/x2apic - thanks Suresh.

	Ingo

>From 11c231a962c740b3216eb6565149ae5a7944cba7 Mon Sep 17 00:00:00 2001
From: Suresh Siddha <suresh.b.siddha@intel.com>
Date: Sat, 23 Aug 2008 17:47:11 +0200
Subject: [PATCH] x86: use x2apic id reported by cpuid during topology discovery, fix

v2: Fix for !SMP build

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/kernel/cpu/addon_cpuid_features.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index aa9641a..a2d1a54 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -69,6 +69,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
  */
 void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 {
+#ifdef CONFIG_SMP
 	unsigned int eax, ebx, ecx, edx, sub_index;
 	unsigned int ht_mask_width, core_plus_mask_width;
 	unsigned int core_select_mask, core_level_siblings;
@@ -132,6 +133,7 @@ void __cpuinit detect_extended_topology(struct cpuinfo_x86 *c)
 		printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 		       c->cpu_core_id);
 	return;
+#endif
 }
 
 #ifdef CONFIG_X86_PAT