[PATCH 0/8] tip/x86/apic - merging snippet

[PATCH 0/8] tip/x86/apic - merging snippet

[Cyrill Gorcunov]

  Hi, it seems I'm braking apic merging (due to lack of time)
so here is small series of merging patches. The pactes actually
becoming more and more... well... harmfull I would say so please
check them twise - especially:

5/8 -	I've moved hard_smp_processor_id to apic from the header
	since for x86 we're linked to apic code anyway
6/8 -	setup_local_APIC now uses preempt_disable/enable on 32bit
	mode

Any comments are quite welcome.

The patches are over the -tip/x86/apic

commit 11494547b1754c4f3bd7f707ab869e2adf54d52f
Author: Yinghai Lu <yhlu.kernel@gmail.com>
Date:   Thu Aug 21 01:01:19 2008 -0700

    x86: fix apic version warning
    
    after following patch,

I noticed Yinghai posted variables ordering patch - if
the series would conflict - just letme know.

		- Cyrill -

[PATCH 1/8] x86: apic_64.c - setup_APIC_timer has to be __cpuinit function

[Cyrill Gorcunov]

There is no need to hold this code if CPU_HOTPLUG is not
defined

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_64.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 37e0376..5c908dc 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -392,7 +392,7 @@ static void lapic_timer_broadcast(cpumask_t mask)
  * Setup the local APIC timer for this CPU. Copy the initilized values
  * of the boot CPU and register the clock event in the framework.
  */
-static void setup_APIC_timer(void)
+static void __cpuinit setup_APIC_timer(void)
 {
 	struct clock_event_device *levt = &__get_cpu_var(lapic_events);
 
-- 
1.6.0.6.gc667

[PATCH 2/8] x86: apic - introduce get_physical_broadcast for 64bit

[Cyrill Gorcunov]

We don't really use it now on 64bit mode but
could reserve it for future.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_64.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 5c908dc..6272c60 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -241,6 +241,14 @@ void __cpuinit enable_NMI_through_LVT0(void)
 }
 
 /**
+ * get_physical_broadcast - Get number of physical broadcast IDs
+ */
+int get_physical_broadcast(void)
+{
+	return modern_apic() ? 0xff : 0xf;
+}
+
+/**
  * lapic_get_maxlvt - get the maximum number of local vector table entries
  */
 int lapic_get_maxlvt(void)
-- 
1.6.0.6.gc667

[PATCH 3/8] x86: apic - unify setup_apicpmtimer

[Cyrill Gorcunov]

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_32.c |   10 ++++++++++
 arch/x86/kernel/apic_64.c |    2 ++
 2 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index b8d80c2..ad295cf 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1778,6 +1778,16 @@ static int __init parse_nolapic_timer(char *arg)
 }
 early_param("nolapic_timer", parse_nolapic_timer);
 
+#ifdef CONFIG_X86_64
+static __init int setup_apicpmtimer(char *s)
+{
+	apic_calibrate_pmtmr = 1;
+	notsc_setup(NULL);
+	return 0;
+}
+__setup("apicpmtimer", setup_apicpmtimer);
+#endif
+
 static int __init apic_set_verbosity(char *arg)
 {
 	if (!arg)  {
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 6272c60..03641d7 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -1806,6 +1806,7 @@ static int __init parse_nolapic_timer(char *arg)
 }
 early_param("nolapic_timer", parse_nolapic_timer);
 
+#ifdef CONFIG_X86_64
 static __init int setup_apicpmtimer(char *s)
 {
 	apic_calibrate_pmtmr = 1;
@@ -1813,6 +1814,7 @@ static __init int setup_apicpmtimer(char *s)
 	return 0;
 }
 __setup("apicpmtimer", setup_apicpmtimer);
+#endif
 
 static int __init apic_set_verbosity(char *arg)
 {
-- 
1.6.0.6.gc667

[PATCH 4/8] x86: apic_64.c - add sanity check for spurious vector definition

[Cyrill Gorcunov]

Do not check for SPUTIOUS_APIC_VECTOR definition twice.
Check it once - is what we need.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_64.c |    9 +++++++--
 1 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 03641d7..b220726 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -45,6 +45,13 @@
 #include <mach_ipi.h>
 #include <mach_apic.h>
 
+/*
+ * Sanity check
+ */
+#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
+# error SPURIOUS_APIC_VECTOR definition error
+#endif
+
 /* Disable local APIC timer from the kernel commandline or via dmi quirk */
 static int disable_apic_timer __cpuinitdata;
 static int apic_calibrate_pmtmr __initdata;
@@ -929,8 +936,6 @@ void __cpuinit setup_local_APIC(void)
 	preempt_disable();
 	value = apic_read(APIC_LVR);
 
-	BUILD_BUG_ON((SPURIOUS_APIC_VECTOR & 0x0f) != 0x0f);
-
 	/*
 	 * Double-check whether this APIC is really registered.
 	 * This is meaningless in clustered apic mode, so we skip it.
-- 
1.6.0.6.gc667

[PATCH 5/8] x86: apic - unify hard_smp_processor_id

[Cyrill Gorcunov]

Move hard_smp_processor_id to apic_32.c.
There is no need to keep it in header - we are linked to
apic_xx.c code anyway.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_32.c |    5 +++++
 include/asm-x86/smp.h     |   10 ----------
 2 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index ad295cf..c71a77c 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -1569,6 +1569,11 @@ void __cpuinit generic_processor_info(int apicid, int version)
 	cpu_set(cpu, cpu_present_map);
 }
 
+int hard_smp_processor_id(void)
+{
+	return read_apic_id();
+}
+
 /*
  * Power management
  */
diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
index 29324c1..914a73d 100644
--- a/include/asm-x86/smp.h
+++ b/include/asm-x86/smp.h
@@ -185,17 +185,7 @@ static inline unsigned int read_apic_id(void)
 }
 #endif
 
-
-# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
 extern int hard_smp_processor_id(void);
-# else
-#include <mach_apicdef.h>
-static inline int hard_smp_processor_id(void)
-{
-	/* we don't want to mark this access volatile - bad code generation */
-	return read_apic_id();
-}
-# endif /* APIC_DEFINITION */
 
 #else /* CONFIG_X86_LOCAL_APIC */
 
-- 
1.6.0.6.gc667

[PATCH 6/8] x86: apic - unify setup_local_APIC

[Cyrill Gorcunov]

- remove useless read of APIC_LVR
- wrap with preempt_disable/enable
- check for integrated APIC just in place

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_32.c |   33 ++++++++++++++++++++----
 arch/x86/kernel/apic_64.c |   59 +++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 82 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index c71a77c..5340295 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -75,7 +75,9 @@ char system_vectors[NR_VECTORS] = { [0 ... NR_VECTORS-1] = SYS_VECTOR_FREE};
  */
 unsigned int apic_verbosity;
 
+#ifdef CONFIG_X86_32
 int pic_mode;
+#endif
 
 /* Have we found an MP table */
 int smp_found_config;
@@ -1031,9 +1033,10 @@ static void __cpuinit lapic_setup_esr(void)
  */
 void __cpuinit setup_local_APIC(void)
 {
-	unsigned long value, integrated;
+	unsigned int value;
 	int i, j;
 
+#ifdef CONFIG_X86_32
 	/* Pound the ESR really hard over the head with a big hammer - mbligh */
 	if (esr_disable) {
 		apic_write(APIC_ESR, 0);
@@ -1041,14 +1044,16 @@ void __cpuinit setup_local_APIC(void)
 		apic_write(APIC_ESR, 0);
 		apic_write(APIC_ESR, 0);
 	}
+#endif
 
-	integrated = lapic_is_integrated();
+	preempt_disable();
 
 	/*
 	 * Double-check whether this APIC is really registered.
+	 * This is meaningless in clustered apic mode, so we skip it.
 	 */
 	if (!apic_id_registered())
-		WARN_ON_ONCE(1);
+		BUG();
 
 	/*
 	 * Intel recommends to set DFR, LDR and TPR before enabling
@@ -1094,6 +1099,7 @@ void __cpuinit setup_local_APIC(void)
 	 */
 	value |= APIC_SPIV_APIC_ENABLED;
 
+#ifdef CONFIG_X86_32
 	/*
 	 * Some unknown Intel IO/APIC (or APIC) errata is biting us with
 	 * certain networking cards. If high frequency interrupts are
@@ -1114,8 +1120,13 @@ void __cpuinit setup_local_APIC(void)
 	 * See also the comment in end_level_ioapic_irq().  --macro
 	 */
 
-	/* Enable focus processor (bit==0) */
+	/*
+	 * - enable focus processor (bit==0)
+	 * - 64bit mode always use processor focus
+	 *   so no need to set it
+	 */
 	value &= ~APIC_SPIV_FOCUS_DISABLED;
+#endif
 
 	/*
 	 * Set spurious IRQ vector
@@ -1134,7 +1145,15 @@ void __cpuinit setup_local_APIC(void)
 	 * TODO: set up through-local-APIC from through-I/O-APIC? --macro
 	 */
 	value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
-	if (!smp_processor_id() && (pic_mode || !value)) {
+#ifdef CONFIG_X86_32
+	/*
+	 * a bit strange form to reduce variables being
+	 * checked: it should be (pic_mode || !value)
+	 * so we swirl it
+	 */
+	value |= !!!pic_mode;
+#endif
+	if (!smp_processor_id() && !value) {
 		value = APIC_DM_EXTINT;
 		apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
 				smp_processor_id());
@@ -1152,9 +1171,11 @@ void __cpuinit setup_local_APIC(void)
 		value = APIC_DM_NMI;
 	else
 		value = APIC_DM_NMI | APIC_LVT_MASKED;
-	if (!integrated)		/* 82489DX */
+	if (lapic_is_integrated())		/* 82489DX */
 		value |= APIC_LVT_LEVEL_TRIGGER;
 	apic_write(APIC_LVT1, value);
+
+	preempt_enable();
 }
 
 void __cpuinit end_local_APIC_setup(void)
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index b220726..99b5f97 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -71,6 +71,10 @@ EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok);
  */
 unsigned int apic_verbosity;
 
+#ifdef CONFIG_X86_32
+int pic_mode;
+#endif
+
 /* Have we found an MP table */
 int smp_found_config;
 
@@ -933,8 +937,17 @@ void __cpuinit setup_local_APIC(void)
 	unsigned int value;
 	int i, j;
 
+#ifdef CONFIG_X86_32
+	/* Pound the ESR really hard over the head with a big hammer - mbligh */
+	if (esr_disable) {
+		apic_write(APIC_ESR, 0);
+		apic_write(APIC_ESR, 0);
+		apic_write(APIC_ESR, 0);
+		apic_write(APIC_ESR, 0);
+	}
+#endif
+
 	preempt_disable();
-	value = apic_read(APIC_LVR);
 
 	/*
 	 * Double-check whether this APIC is really registered.
@@ -987,7 +1000,34 @@ void __cpuinit setup_local_APIC(void)
 	 */
 	value |= APIC_SPIV_APIC_ENABLED;
 
-	/* We always use processor focus */
+#ifdef CONFIG_X86_32
+	/*
+	 * Some unknown Intel IO/APIC (or APIC) errata is biting us with
+	 * certain networking cards. If high frequency interrupts are
+	 * happening on a particular IOAPIC pin, plus the IOAPIC routing
+	 * entry is masked/unmasked at a high rate as well then sooner or
+	 * later IOAPIC line gets 'stuck', no more interrupts are received
+	 * from the device. If focus CPU is disabled then the hang goes
+	 * away, oh well :-(
+	 *
+	 * [ This bug can be reproduced easily with a level-triggered
+	 *   PCI Ne2000 networking cards and PII/PIII processors, dual
+	 *   BX chipset. ]
+	 */
+	/*
+	 * Actually disabling the focus CPU check just makes the hang less
+	 * frequent as it makes the interrupt distributon model be more
+	 * like LRU than MRU (the short-term load is more even across CPUs).
+	 * See also the comment in end_level_ioapic_irq().  --macro
+	 */
+
+	/*
+	 * - enable focus processor (bit==0)
+	 * - 64bit mode always use processor focus
+	 *   so no need to set it
+	 */
+	value &= ~APIC_SPIV_FOCUS_DISABLED;
+#endif
 
 	/*
 	 * Set spurious IRQ vector
@@ -1006,14 +1046,22 @@ void __cpuinit setup_local_APIC(void)
 	 * TODO: set up through-local-APIC from through-I/O-APIC? --macro
 	 */
 	value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
+#ifdef CONFIG_X86_32
+	/*
+	 * a bit strange form to reduce variables being
+	 * checked: it should be (pic_mode || !value)
+	 * so we swirl it
+	 */
+	value |= !!!pic_mode;
+#endif
 	if (!smp_processor_id() && !value) {
 		value = APIC_DM_EXTINT;
 		apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n",
-			    smp_processor_id());
+				smp_processor_id());
 	} else {
 		value = APIC_DM_EXTINT | APIC_LVT_MASKED;
 		apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n",
-			    smp_processor_id());
+				smp_processor_id());
 	}
 	apic_write(APIC_LVT0, value);
 
@@ -1024,7 +1072,10 @@ void __cpuinit setup_local_APIC(void)
 		value = APIC_DM_NMI;
 	else
 		value = APIC_DM_NMI | APIC_LVT_MASKED;
+	if (lapic_is_integrated())		/* 82489DX */
+		value |= APIC_LVT_LEVEL_TRIGGER;
 	apic_write(APIC_LVT1, value);
+
 	preempt_enable();
 }
 
-- 
1.6.0.6.gc667

[PATCH 7/8] x86: apic_32.c should use __cpuinit section

[Cyrill Gorcunov]

All callers are __init or __cpuinit so there is no need
to hold this code without CPU_HOTPLUG being set.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_32.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 5340295..0c608ac 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -383,7 +383,7 @@ static void lapic_timer_broadcast(cpumask_t mask)
  * Setup the local APIC timer for this CPU. Copy the initilized values
  * of the boot CPU and register the clock event in the framework.
  */
-static void __devinit setup_APIC_timer(void)
+static void __cpuinit setup_APIC_timer(void)
 {
 	struct clock_event_device *levt = &__get_cpu_var(lapic_events);
 
@@ -652,7 +652,7 @@ void __init setup_boot_APIC_clock(void)
 	setup_APIC_timer();
 }
 
-void __devinit setup_secondary_APIC_clock(void)
+void __cpuinit setup_secondary_APIC_clock(void)
 {
 	setup_APIC_timer();
 }
@@ -1732,7 +1732,7 @@ static struct sys_device device_lapic = {
 	.cls	= &lapic_sysclass,
 };
 
-static void __devinit apic_pm_activate(void)
+static void __cpuinit apic_pm_activate(void)
 {
 	apic_pm_state.active = 1;
 }
-- 
1.6.0.6.gc667

[PATCH 8/8] x86: apic - unify smp_apic_timer_interrupt

[Cyrill Gorcunov]

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 arch/x86/kernel/apic_32.c |    3 +++
 arch/x86/kernel/apic_64.c |    2 ++
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 0c608ac..a7193cb 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -718,6 +718,9 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
 	 * Besides, if we don't timer interrupts ignore the global
 	 * interrupt lock, which is the WrongThing (tm) to do.
 	 */
+#ifdef CONFIG_X86_64
+	exit_idle();
+#endif
 	irq_enter();
 	local_apic_timer_interrupt();
 	irq_exit();
diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index 99b5f97..bcfa91d 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -617,7 +617,9 @@ void smp_apic_timer_interrupt(struct pt_regs *regs)
 	 * Besides, if we don't timer interrupts ignore the global
 	 * interrupt lock, which is the WrongThing (tm) to do.
 	 */
+#ifdef CONFIG_X86_64
 	exit_idle();
+#endif
 	irq_enter();
 	local_apic_timer_interrupt();
 	irq_exit();
-- 
1.6.0.6.gc667

Re: [PATCH 5/8] x86: apic - unify hard_smp_processor_id

[Yinghai Lu]

On Sat, Aug 23, 2008 at 6:01 AM, Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> Move hard_smp_processor_id to apic_32.c.
> There is no need to keep it in header - we are linked to
> apic_xx.c code anyway.
>
> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
> ---
>  arch/x86/kernel/apic_32.c |    5 +++++
>  include/asm-x86/smp.h     |   10 ----------
>  2 files changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
> index ad295cf..c71a77c 100644
> --- a/arch/x86/kernel/apic_32.c
> +++ b/arch/x86/kernel/apic_32.c
> @@ -1569,6 +1569,11 @@ void __cpuinit generic_processor_info(int apicid, int version)
>        cpu_set(cpu, cpu_present_map);
>  }
>
> +int hard_smp_processor_id(void)
> +{
> +       return read_apic_id();
> +}
> +
>  /*
>  * Power management
>  */
> diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
> index 29324c1..914a73d 100644
> --- a/include/asm-x86/smp.h
> +++ b/include/asm-x86/smp.h
> @@ -185,17 +185,7 @@ static inline unsigned int read_apic_id(void)
>  }
>  #endif
>
> -
> -# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
>  extern int hard_smp_processor_id(void);
> -# else
> -#include <mach_apicdef.h>
> -static inline int hard_smp_processor_id(void)
> -{
> -       /* we don't want to mark this access volatile - bad code generation */
> -       return read_apic_id();
> -}
> -# endif /* APIC_DEFINITION */
>
>  #else /* CONFIG_X86_LOCAL_APIC */
>
> --
> 1.6.0.6.gc667
>
>

this one seems have some problem with 32bit with genericarch

because we have

int hard_smp_processor_id(void)
{
        return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
}

arch/x86/mach-generic/probe.c

updated 64 bit to have MACRO.

YH

Re: [PATCH 5/8] x86: apic - unify hard_smp_processor_id

[Cyrill Gorcunov]

[Yinghai Lu - Sat, Aug 23, 2008 at 12:13:21PM -0700]
| On Sat, Aug 23, 2008 at 6:01 AM, Cyrill Gorcunov <gorcunov@gmail.com> wrote:
| > Move hard_smp_processor_id to apic_32.c.
| > There is no need to keep it in header - we are linked to
| > apic_xx.c code anyway.
| >
| > Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
| > ---
| >  arch/x86/kernel/apic_32.c |    5 +++++
| >  include/asm-x86/smp.h     |   10 ----------
| >  2 files changed, 5 insertions(+), 10 deletions(-)
| >
| > diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
| > index ad295cf..c71a77c 100644
| > --- a/arch/x86/kernel/apic_32.c
| > +++ b/arch/x86/kernel/apic_32.c
| > @@ -1569,6 +1569,11 @@ void __cpuinit generic_processor_info(int apicid, int version)
| >        cpu_set(cpu, cpu_present_map);
| >  }
| >
| > +int hard_smp_processor_id(void)
| > +{
| > +       return read_apic_id();
| > +}
| > +
| >  /*
| >  * Power management
| >  */
| > diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
| > index 29324c1..914a73d 100644
| > --- a/include/asm-x86/smp.h
| > +++ b/include/asm-x86/smp.h
| > @@ -185,17 +185,7 @@ static inline unsigned int read_apic_id(void)
| >  }
| >  #endif
| >
| > -
| > -# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
| >  extern int hard_smp_processor_id(void);
| > -# else
| > -#include <mach_apicdef.h>
| > -static inline int hard_smp_processor_id(void)
| > -{
| > -       /* we don't want to mark this access volatile - bad code generation */
| > -       return read_apic_id();
| > -}
| > -# endif /* APIC_DEFINITION */
| >
| >  #else /* CONFIG_X86_LOCAL_APIC */
| >
| > --
| > 1.6.0.6.gc667
| >
| >
| 
| this one seems have some problem with 32bit with genericarch
| 
| because we have
| 
| int hard_smp_processor_id(void)
| {
|         return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
| }
| 
| arch/x86/mach-generic/probe.c
| 
| updated 64 bit to have MACRO.
| 
| YH
| 

thanks Yinghai, but isn't it called _after_ x86 apic chip
initialized?

		- Cyrill -

Re: [PATCH 5/8] x86: apic - unify hard_smp_processor_id

[Yinghai Lu]

On Sat, Aug 23, 2008 at 12:45 PM, Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> [Yinghai Lu - Sat, Aug 23, 2008 at 12:13:21PM -0700]
> | On Sat, Aug 23, 2008 at 6:01 AM, Cyrill Gorcunov <gorcunov@gmail.com> wrote:
> | > Move hard_smp_processor_id to apic_32.c.
> | > There is no need to keep it in header - we are linked to
> | > apic_xx.c code anyway.
> | >
> | > Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
> | > ---
> | >  arch/x86/kernel/apic_32.c |    5 +++++
> | >  include/asm-x86/smp.h     |   10 ----------
> | >  2 files changed, 5 insertions(+), 10 deletions(-)
> | >
> | > diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
> | > index ad295cf..c71a77c 100644
> | > --- a/arch/x86/kernel/apic_32.c
> | > +++ b/arch/x86/kernel/apic_32.c
> | > @@ -1569,6 +1569,11 @@ void __cpuinit generic_processor_info(int apicid, int version)
> | >        cpu_set(cpu, cpu_present_map);
> | >  }
> | >
> | > +int hard_smp_processor_id(void)
> | > +{
> | > +       return read_apic_id();
> | > +}
> | > +
> | >  /*
> | >  * Power management
> | >  */
> | > diff --git a/include/asm-x86/smp.h b/include/asm-x86/smp.h
> | > index 29324c1..914a73d 100644
> | > --- a/include/asm-x86/smp.h
> | > +++ b/include/asm-x86/smp.h
> | > @@ -185,17 +185,7 @@ static inline unsigned int read_apic_id(void)
> | >  }
> | >  #endif
> | >
> | > -
> | > -# if defined(APIC_DEFINITION) || defined(CONFIG_X86_64)
> | >  extern int hard_smp_processor_id(void);
> | > -# else
> | > -#include <mach_apicdef.h>
> | > -static inline int hard_smp_processor_id(void)
> | > -{
> | > -       /* we don't want to mark this access volatile - bad code generation */
> | > -       return read_apic_id();
> | > -}
> | > -# endif /* APIC_DEFINITION */
> | >
> | >  #else /* CONFIG_X86_LOCAL_APIC */
> | >
> | > --
> | > 1.6.0.6.gc667
> | >
> | >
> |
> | this one seems have some problem with 32bit with genericarch
> |
> | because we have
> |
> | int hard_smp_processor_id(void)
> | {
> |         return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
> | }
> |
> | arch/x86/mach-generic/probe.c
> |
> | updated 64 bit to have MACRO.
> |
> | YH
> |
>
> thanks Yinghai, but isn't it called _after_ x86 apic chip
> initialized?

32 bit need to do sth special when subarch

YH

Re: [PATCH 5/8] x86: apic - unify hard_smp_processor_id

[Cyrill Gorcunov]

[Cyrill Gorcunov - Sat, Aug 23, 2008 at 11:45:41PM +0400]
...
| | 
| | this one seems have some problem with 32bit with genericarch
| | 
| | because we have
| | 
| | int hard_smp_processor_id(void)
| | {
| |         return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
| | }
| | 
| | arch/x86/mach-generic/probe.c
| | 
| | updated 64 bit to have MACRO.
| | 
| | YH
| | 
| 
| thanks Yinghai, but isn't it called _after_ x86 apic chip
| initialized?
| 
| 		- Cyrill -

it's not related to initializaton - ignore my prev mail please.
(just a notice: If you've 64bit version updated to MACRO dont
forget you will need read_apic_id as well).

		- Cyrill -