From: Suresh Siddha <suresh.b.siddha@intel.com>
To: mingo@elte.hu, hpa@zytor.com, tglx@linutronix.de
Cc: linux-kernel@vger.kernel.org, Yinghai Lu <yhlu.kernel@gmail.com>,
Suresh Siddha <suresh.b.siddha@intel.com>,
"Maciej W. Rozycki" <macro@linux-mips.org>
Subject: [patch 1/5] x2apic: fix reserved APIC register accesses in print_local_APIC()
Date: Wed, 03 Sep 2008 16:58:31 -0700 [thread overview]
Message-ID: <20080904000237.746216000@linux-os.sc.intel.com> (raw)
[-- Attachment #1: fix_reserved_apic_reg_access.patch --]
[-- Type: text/plain, Size: 2727 bytes --]
From: Yinghai Lu <yhlu.kernel@gmail.com>
Subject: x2apic: fix reserved APIC register accesses in print_local_APIC()
APIC_ARBPRI is a reserved register for XAPIC and beyond.
APIC_RRR is a reserved register except for 82489DX, APIC for Pentium processors.
APIC_EOI is a write only register.
APIC_DFR is reserved in x2apic mode.
Access to these registers in x2apic will result in #GP fault. Fix these
apic register accesses.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
---
Index: tip/arch/x86/kernel/io_apic.c
===================================================================
--- tip.orig/arch/x86/kernel/io_apic.c 2008-09-03 14:02:56.000000000 -0700
+++ tip/arch/x86/kernel/io_apic.c 2008-09-03 14:51:24.000000000 -0700
@@ -1751,21 +1751,30 @@
printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK);
if (APIC_INTEGRATED(ver)) { /* !82489DX */
- v = apic_read(APIC_ARBPRI);
- printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v,
- v & APIC_ARBPRI_MASK);
+ if (!APIC_XAPIC(ver)) {
+ v = apic_read(APIC_ARBPRI);
+ printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v,
+ v & APIC_ARBPRI_MASK);
+ }
v = apic_read(APIC_PROCPRI);
printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v);
}
- v = apic_read(APIC_EOI);
- printk(KERN_DEBUG "... APIC EOI: %08x\n", v);
- v = apic_read(APIC_RRR);
- printk(KERN_DEBUG "... APIC RRR: %08x\n", v);
+ /*
+ * Remote read supported only in the 82489DX and local APIC for
+ * Pentium processors.
+ */
+ if (!APIC_INTEGRATED(ver) || maxlvt == 3) {
+ v = apic_read(APIC_RRR);
+ printk(KERN_DEBUG "... APIC RRR: %08x\n", v);
+ }
+
v = apic_read(APIC_LDR);
printk(KERN_DEBUG "... APIC LDR: %08x\n", v);
- v = apic_read(APIC_DFR);
- printk(KERN_DEBUG "... APIC DFR: %08x\n", v);
+ if (!x2apic_enabled()) {
+ v = apic_read(APIC_DFR);
+ printk(KERN_DEBUG "... APIC DFR: %08x\n", v);
+ }
v = apic_read(APIC_SPIV);
printk(KERN_DEBUG "... APIC SPIV: %08x\n", v);
Index: tip/include/asm-x86/apic.h
===================================================================
--- tip.orig/include/asm-x86/apic.h 2008-09-03 14:02:56.000000000 -0700
+++ tip/include/asm-x86/apic.h 2008-09-03 14:43:02.000000000 -0700
@@ -98,6 +98,20 @@
extern void enable_x2apic(void);
extern void enable_IR_x2apic(void);
extern void x2apic_icr_write(u32 low, u32 id);
+static inline int x2apic_enabled(void)
+{
+ int msr, msr2;
+
+ if (!cpu_has_x2apic)
+ return 0;
+
+ rdmsr(MSR_IA32_APICBASE, msr, msr2);
+ if (msr & X2APIC_ENABLE)
+ return 1;
+ return 0;
+}
+#else
+#define x2apic_enabled() 0
#endif
struct apic_ops {
--
next reply other threads:[~2008-09-04 0:10 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-03 23:58 Suresh Siddha [this message]
2008-09-03 23:58 ` [patch 2/5] dmar: fix using early fixmap mapping for DMAR table parsing Suresh Siddha
2008-09-03 23:58 ` [patch 3/5] dmar: initialize the return value in dmar_parse_dev() Suresh Siddha
2008-09-03 23:58 ` [patch 4/5] dmar: use list_for_each_entry_safe() in dmar_dev_scope_init() Suresh Siddha
2008-09-03 23:58 ` [patch 5/5] dmar: fix dmar_parse_dev() devices_cnt error condition check Suresh Siddha
2008-09-04 11:06 ` [patch 1/5] x2apic: fix reserved APIC register accesses in print_local_APIC() Ingo Molnar
2008-09-04 17:51 ` Suresh Siddha
2008-09-05 8:10 ` Ingo Molnar
2008-09-05 9:18 ` Jesse Barnes
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