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From: Joerg Roedel <joro@8bytes.org>
To: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Cc: joerg.roedel@amd.com, iommu@lists.linux-foundation.org,
	linux-kernel@vger.kernel.org, mingo@elte.hu
Subject: Re: [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing
Date: Fri, 19 Sep 2008 08:29:46 +0200	[thread overview]
Message-ID: <20080919062946.GH27426@8bytes.org> (raw)
In-Reply-To: <20080919081020S.fujita.tomonori@lab.ntt.co.jp>

On Fri, Sep 19, 2008 at 08:10:32AM +0900, FUJITA Tomonori wrote:
> On Thu, 18 Sep 2008 16:03:50 +0200
> Joerg Roedel <joerg.roedel@amd.com> wrote:
> 
> > On Thu, Sep 18, 2008 at 10:29:24AM +0900, FUJITA Tomonori wrote:
> > > On Wed, 17 Sep 2008 21:28:27 +0200
> > > Joerg Roedel <joro@8bytes.org> wrote:
> > > 
> > > > On Thu, Sep 18, 2008 at 04:20:18AM +0900, FUJITA Tomonori wrote:
> > > > > On Wed, 17 Sep 2008 18:52:37 +0200
> > > > > Joerg Roedel <joerg.roedel@amd.com> wrote:
> > > > > 
> > > > > > The IO/TLB flushing on every unmaping operation is the most expensive
> > > > > > part there and not strictly necessary. It is sufficient to do the flush
> > > > > > before any entries are reused. This is patch implements lazy IO/TLB
> > > > > > flushing which does exactly this.
> > > > > > 
> > > > > > Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
> > > > > > ---
> > > > > >  Documentation/kernel-parameters.txt |    5 +++++
> > > > > >  arch/x86/kernel/amd_iommu.c         |   26 ++++++++++++++++++++++----
> > > > > >  arch/x86/kernel/amd_iommu_init.c    |   10 +++++++++-
> > > > > >  include/asm-x86/amd_iommu_types.h   |    9 +++++++++
> > > > > >  4 files changed, 45 insertions(+), 5 deletions(-)
> > > > > > 
> > > > > > diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> > > > > > index c2e00ee..5f0aefe 100644
> > > > > > --- a/Documentation/kernel-parameters.txt
> > > > > > +++ b/Documentation/kernel-parameters.txt
> > > > > > @@ -284,6 +284,11 @@ and is between 256 and 4096 characters. It is defined in the file
> > > > > >  			isolate - enable device isolation (each device, as far
> > > > > >  			          as possible, will get its own protection
> > > > > >  			          domain)
> > > > > > +			unmap_flush - enable flushing of IO/TLB entries when
> > > > > > +			              they are unmapped. Otherwise they are
> > > > > > +				      flushed before they will be reused, which
> > > > > > +				      is a lot of faster
> > > > > > +
> > > > > 
> > > > > Would it be nice to have consistency of IOMMU parameters?
> > > > 
> > > > True. We should merge common parameters across IOMMUs into the
> > > > iommu= parameter some time in the future, I think. It would also be the
> > > > place for the IOMMU size parameter.
> > > 
> > > Hmm, now is better than the future? I think that now you can add
> > > something like 'disable_batching_flush' as a common parameter and
> > > change AMD IOMMU to use it.
> > 
> > Ok, I queued the following patch in the AMD IOMMU updates and changed
> > this patch to use iommu_fullflush instead. Is this patch ok? It changes
> > the behavior of GART to use lazy flushing by default. But I don't think
> > that this is a problem.
> > 
> > commit 9769771290fddcfc0362c5d30242151d4eb1cc46
> > Author: Joerg Roedel <joerg.roedel@amd.com>
> > Date:   Thu Sep 18 15:23:43 2008 +0200
> > 
> >     x86: move GART TLB flushing options to generic code
> >     
> >     The GART currently implements the iommu=[no]fullflush command line
> >     parameters which influence its IO/TLB flushing strategy. This patch
> >     makes these parameters generic so that they can be used by the AMD IOMMU
> >     too.
> >     
> >     Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
> > 
> > diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
> > index c2e00ee..569527e 100644
> > --- a/Documentation/kernel-parameters.txt
> > +++ b/Documentation/kernel-parameters.txt
> > @@ -888,6 +888,10 @@ and is between 256 and 4096 characters. It is defined in the file
> >  		nomerge
> >  		forcesac
> >  		soft
> > +		fullflush
> > +			Flush IO/TLB at every deallocation
> > +		nofullflush
> > +			Flush IO/TLB only when addresses are reused (default)
> 
> I'm not sure about making 'nofullflush' a generic option. Enabling
> nofullflush option doesn't change anything. So what's the point of the
> option?

Backwards compatability with the GART code. These two options are
basically just moved from the GART code to pci-dma.c. But otherwise its
pointless, I can remove it if everybody else agrees.

Joerg


  reply	other threads:[~2008-09-19  6:29 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-09-17 16:52 [PATCH 0/23] AMD IOMMU 2.6.28 updates for review Joerg Roedel
2008-09-17 16:52 ` [PATCH 01/23] AMD IOMMU: check for invalid device pointers Joerg Roedel
2008-09-17 16:52 ` [PATCH 02/23] AMD IOMMU: move TLB flushing to the map/unmap helper functions Joerg Roedel
2008-09-17 16:52 ` [PATCH 03/23] AMD IOMMU: implement lazy IO/TLB flushing Joerg Roedel
2008-09-17 19:20   ` FUJITA Tomonori
2008-09-17 19:28     ` Joerg Roedel
2008-09-18  1:29       ` FUJITA Tomonori
2008-09-18 10:13         ` Joerg Roedel
2008-09-18 14:03         ` Joerg Roedel
2008-09-18 23:10           ` FUJITA Tomonori
2008-09-19  6:29             ` Joerg Roedel [this message]
2008-09-19 10:21               ` FUJITA Tomonori
2008-09-19 17:43           ` Joerg Roedel
2008-09-19 18:40             ` FUJITA Tomonori
2008-09-19 19:27               ` Joerg Roedel
2008-09-19 18:47             ` Keshavamurthy, Anil S
2008-09-19 18:47             ` Keshavamurthy, Anil S
2008-09-19 18:48             ` Keshavamurthy, Anil S
2008-09-21  9:05               ` Joerg Roedel
2008-09-22 16:26                 ` David Woodhouse
2008-09-21  5:27             ` Muli Ben-Yehuda
2008-09-17 16:52 ` [PATCH 04/23] AMD IOMMU: add branch hints to completion wait checks Joerg Roedel
2008-09-17 16:52 ` [PATCH 05/23] AMD IOMMU: align alloc_coherent addresses properly Joerg Roedel
2008-09-17 16:52 ` [PATCH 06/23] AMD IOMMU: add event buffer allocation Joerg Roedel
2008-09-17 16:52 ` [PATCH 07/23] AMD IOMMU: save pci segment from ACPI tables Joerg Roedel
2008-09-17 16:52 ` [PATCH 08/23] AMD IOMMU: save pci_dev instead of devid Joerg Roedel
2008-09-17 16:52 ` [PATCH 09/23] AMD IOMMU: add MSI interrupt support Joerg Roedel
2008-09-17 16:52 ` [PATCH 10/23] AMD IOMMU: add event handling code Joerg Roedel
2008-09-17 16:52 ` [PATCH 11/23] AMD IOMMU: enable event logging Joerg Roedel
2008-09-17 16:52 ` [PATCH 12/23] AMD IOMMU: allow IO page faults from devices Joerg Roedel
2008-09-17 16:52 ` [PATCH 13/23] AMD IOMMU: add dma_supported callback Joerg Roedel
2008-09-17 16:52 ` [PATCH 14/23] AMD IOMMU: don't assing preallocated protection domains to devices Joerg Roedel
2008-09-17 16:52 ` [PATCH 15/23] AMD IOMMU: some set_device_domain cleanups Joerg Roedel
2008-09-17 16:52 ` [PATCH 16/23] AMD IOMMU: avoid unnecessary low zone allocation in alloc_coherent Joerg Roedel
2008-09-17 16:52 ` [PATCH 17/23] AMD IOMMU: replace memset with __GFP_ZERO " Joerg Roedel
2008-09-17 16:52 ` [PATCH 18/23] AMD IOMMU: simplify dma_mask_to_pages Joerg Roedel
2008-09-17 19:20   ` FUJITA Tomonori
2008-09-18  7:32     ` Joerg Roedel
2008-09-18 15:57       ` FUJITA Tomonori
2008-09-18 16:39         ` Joerg Roedel
2008-09-17 16:52 ` [PATCH 19/23] AMD IOMMU: free domain bitmap with its allocation order Joerg Roedel
2008-09-17 16:52 ` [PATCH 20/23] AMD IOMMU: remove unnecessary cast to u64 in the init code Joerg Roedel
2008-09-17 16:52 ` [PATCH 21/23] AMD IOMMU: calculate IVHD size with a function Joerg Roedel
2008-09-17 16:52 ` [PATCH 22/23] AMD IOMMU: use cmd_buf_size when freeing the command buffer Joerg Roedel
2008-09-17 16:52 ` [PATCH 23/23] add AMD IOMMU tree to MAINTAINERS file Joerg Roedel

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