Re: bad DMAR interaction with iwlagn and SATA

[Muli Ben-Yehuda <muli@il.ibm.com>]

On Thu, Sep 25, 2008 at 10:41:04PM -0400, Jeff Garzik wrote:
> Andres Freund wrote:
>> Hi Jeff,
>> On Friday 26 September 2008, you wrote in "Re: bad DMAR interaction with 
>> iwlagn and SATA":
>>> Andres Freund wrote:
>>>> sleeping I activated DMAR...
>>>> ..
>>>> Second:
>>>> [ 2937.484251] DMAR:[DMA Read] Request device [00:1f.2] fault addr
>>>> fffbf000 [ 2937.484255] DMAR:[fault reason 06] PTE Read access is not 
>>>> set
>>>> [ 2937.484297] ata1.00: exception Emask 0x60 SAct 0x1 SErr 0x800 action
>>>> 0x6 frozen
>>>> [ 2937.484303] ata1.00: irq_stat 0x20000000, host bus error
>>>> [ 2937.484309] ata1: SError: { HostInt }
>>>> [ 2937.484319] ata1.00: cmd 61/08:00:c0:1d:6b/00:00:07:00:00/40 tag 0 
>>>> ncq
>>>> 4096 out
>>>> [ 2937.484321]          res 40/00:00:c0:1d:6b/00:00:07:00:00/40 Emask
>>>> 0x60 (host bus error)
>>> Ouch, a host bus error is serious nastiness...
>> I only hit that with DMAR activated (hit it twice, different boots), so it 
>> seems to be related to that. Is there anything I can help to debug that?
>
> No idea about DMAR.  On the ATA side, it pretty diagnoses itself as
> you see here.  Unfortunately, ATA controller is behaving exactly as
> it should, when a major system error is thrown its way.

The way to debug this is to figure out why device 00:1f.2 is trying to
read from DMA address fffbf000 and does not have permission to do
so. This could be indicative of a driver bug where it is programming
the device to read from some buffer that has not been allocated
through the DMA API and thus does not have a valid IOMMU mapping, or a
hardware quirk where the device tries to read from memory without host
involvement. The former is much more likely.

Cheers,
Muli
-- 
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