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From: Yu Zhao <yu.zhao@intel.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Cc: "jbarnes@virtuousgeek.org" <jbarnes@virtuousgeek.org>,
	"randy.dunlap@oracle.com" <randy.dunlap@oracle.com>,
	"grundler@parisc-linux.org" <grundler@parisc-linux.org>,
	"achiang@hp.com" <achiang@hp.com>,
	"matthew@wil.cx" <matthew@wil.cx>,
	"rdreier@cisco.com" <rdreier@cisco.com>,
	"greg@kroah.com" <greg@kroah.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"virtualization@lists.linux-foundation.org" 
	<virtualization@lists.linux-foundation.org>
Subject: [PATCH 6/15 v5] PCI: add a new function to map BAR offset
Date: Tue, 21 Oct 2008 19:48:27 +0800	[thread overview]
Message-ID: <20081021114827.GG3185@yzhao12-linux.sh.intel.com> (raw)
In-Reply-To: <20081021114056.GA3185@yzhao12-linux.sh.intel.com>

Add a new function to map resource number to base register (offset
and type).

Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Randy Dunlap <randy.dunlap@oracle.com>
Cc: Grant Grundler <grundler@parisc-linux.org>
Cc: Alex Chiang <achiang@hp.com>
Cc: Matthew Wilcox <matthew@wil.cx>
Cc: Roland Dreier <rdreier@cisco.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Yu Zhao <yu.zhao@intel.com>

---
 drivers/pci/pci.c       |   22 ++++++++++++++++++++++
 drivers/pci/pci.h       |    2 ++
 drivers/pci/setup-res.c |   13 +++++--------
 3 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a9b554e..b02167a 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1924,6 +1924,28 @@ int pci_resource_alignment(struct pci_dev *dev, int resno)
 	return 0;
 }
 
+/**
+ * pci_resource_bar - get position of the BAR associated with a resource
+ * @dev: the PCI device
+ * @resno: the resource number
+ * @type: the BAR type to be filled in
+ *
+ * Returns BAR position in config space, or 0 if the BAR is invalid.
+ */
+int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
+{
+	if (resno < PCI_ROM_RESOURCE) {
+		*type = pci_bar_unknown;
+		return PCI_BASE_ADDRESS_0 + 4 * resno;
+	} else if (resno == PCI_ROM_RESOURCE) {
+		*type = pci_bar_mem32;
+		return dev->rom_base_reg;
+	}
+
+	dev_err(&dev->dev, "BAR: invalid resource #%d\n", resno);
+	return 0;
+}
+
 static void __devinit pci_no_domains(void)
 {
 #ifdef CONFIG_PCI_DOMAINS
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index baa3d23..d707477 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -167,6 +167,8 @@ enum pci_bar_type {
 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
 				struct resource *res, unsigned int reg);
 extern int pci_resource_alignment(struct pci_dev *dev, int resno);
+extern int pci_resource_bar(struct pci_dev *dev, int resno,
+			    enum pci_bar_type *type);
 extern void pci_enable_ari(struct pci_dev *dev);
 /**
  * pci_ari_enabled - query ARI forwarding status
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 88a9c70..5812f4b 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -31,6 +31,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
 	struct pci_bus_region region;
 	u32 new, check, mask;
 	int reg;
+	enum pci_bar_type type;
 	struct resource *res = dev->resource + resno;
 
 	/*
@@ -62,17 +63,13 @@ void pci_update_resource(struct pci_dev *dev, int resno)
 	else
 		mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
 
-	if (resno < 6) {
-		reg = PCI_BASE_ADDRESS_0 + 4 * resno;
-	} else if (resno == PCI_ROM_RESOURCE) {
+	reg = pci_resource_bar(dev, resno, &type);
+	if (!reg)
+		return;
+	if (type != pci_bar_unknown) {
 		if (!(res->flags & IORESOURCE_ROM_ENABLE))
 			return;
 		new |= PCI_ROM_ADDRESS_ENABLE;
-		reg = dev->rom_base_reg;
-	} else {
-		/* Hmm, non-standard resource. */
-	
-		return;		/* kill uninitialised var warning */
 	}
 
 	pci_write_config_dword(dev, reg, new);
-- 
1.5.6.4


  parent reply	other threads:[~2008-10-21 12:44 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-21 11:40 [PATCH 0/15 v5] PCI: Linux kernel SR-IOV support Yu Zhao
2008-10-21 11:44 ` [PATCH 1/15 v5] PCI: remove unnecessary arg of pci_update_resource() Yu Zhao
2008-10-21 11:44 ` [PATCH 2/15 v5] PCI: define PCI resource names in an 'enum' Yu Zhao
2008-10-21 11:45 ` [PATCH 3/15 v5] PCI: export __pci_read_base Yu Zhao
2008-10-21 11:47 ` [PATCH 4/15 v5] PCI: make pci_alloc_child_bus() be able to handle NULL bridge Yu Zhao
2008-10-21 11:48 ` [PATCH 5/15 v5] PCI: add a wrapper for resource_alignment() Yu Zhao
2008-10-21 11:48 ` Yu Zhao [this message]
2008-10-21 11:48 ` [PATCH 7/15 v5] PCI: cleanup pcibios_allocate_resources() Yu Zhao
2008-10-21 11:49 ` [PATCH 8/15 v5] PCI: add boot options to reassign resources Yu Zhao
2008-10-22  7:19   ` Ingo Molnar
2008-10-21 11:50 ` [PATCH 9/15 v5] PCI: add boot option to align MMIO resource Yu Zhao
2008-10-21 11:51 ` [PATCH 10/15 v5] PCI: cleanup pci_bus_add_devices() Yu Zhao
2008-10-21 11:52 ` [PATCH 11/15 v5] PCI: split a new function from pci_bus_add_devices() Yu Zhao
2008-10-21 11:53 ` [PATCH 12/15 v5] PCI: support the SR-IOV capability Yu Zhao
2008-10-21 16:50   ` Greg KH
2008-10-22  3:05     ` Zhao, Yu
2008-10-21 11:53 ` [PATCH 13/15 v5] PCI: reserve bus range for the SR-IOV device Yu Zhao
2008-10-21 11:54 ` [PATCH 14/15 v5] PCI: document the SR-IOV Yu Zhao
2008-10-21 11:54 ` [PATCH 15/15 v5] PCI: document the new PCI boot parameters Yu Zhao

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