* [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h @ 2008-12-27 13:02 Jaswinder Singh Rajput 2008-12-29 6:57 ` Alexey Dobriyan 2008-12-29 12:12 ` Ingo Molnar 0 siblings, 2 replies; 14+ messages in thread From: Jaswinder Singh Rajput @ 2008-12-27 13:02 UTC (permalink / raw) To: Ingo Molnar, x86 maintainers, LKML, mj Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> --- arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ arch/x86/kernel/mmconf-fam10h_64.c | 3 +- arch/x86/kernel/reboot.c | 3 +- arch/x86/pci/acpi.c | 2 +- arch/x86/pci/amd_bus.c | 2 +- arch/x86/pci/common.c | 3 +- arch/x86/pci/direct.c | 2 +- arch/x86/pci/early.c | 2 +- arch/x86/pci/fixup.c | 3 +- arch/x86/pci/i386.c | 2 +- arch/x86/pci/init.c | 2 +- arch/x86/pci/irq.c | 3 +- arch/x86/pci/legacy.c | 2 +- arch/x86/pci/mmconfig-shared.c | 3 +- arch/x86/pci/mmconfig_32.c | 2 +- arch/x86/pci/mmconfig_64.c | 3 +- arch/x86/pci/numaq_32.c | 2 +- arch/x86/pci/olpc.c | 2 +- arch/x86/pci/pcbios.c | 5 +- arch/x86/pci/pci.h | 162 ----------------------------------- arch/x86/pci/visws.c | 3 +- 21 files changed, 185 insertions(+), 191 deletions(-) create mode 100644 arch/x86/include/asm/pci_x86.h delete mode 100644 arch/x86/pci/pci.h diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h new file mode 100644 index 0000000..e60fd3e --- /dev/null +++ b/arch/x86/include/asm/pci_x86.h @@ -0,0 +1,165 @@ +/* + * Low-Level PCI Access for i386 machines. + * + * (c) 1999 Martin Mares <mj@ucw.cz> + */ + +#undef DEBUG + +#ifdef DEBUG +#define DBG(x...) printk(x) +#else +#define DBG(x...) +#endif + +#define PCI_PROBE_BIOS 0x0001 +#define PCI_PROBE_CONF1 0x0002 +#define PCI_PROBE_CONF2 0x0004 +#define PCI_PROBE_MMCONF 0x0008 +#define PCI_PROBE_MASK 0x000f +#define PCI_PROBE_NOEARLY 0x0010 + +#define PCI_NO_CHECKS 0x0400 +#define PCI_USE_PIRQ_MASK 0x0800 +#define PCI_ASSIGN_ROMS 0x1000 +#define PCI_BIOS_IRQ_SCAN 0x2000 +#define PCI_ASSIGN_ALL_BUSSES 0x4000 +#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 +#define PCI_USE__CRS 0x10000 +#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000 +#define PCI_HAS_IO_ECS 0x40000 +#define PCI_NOASSIGN_ROMS 0x80000 + +extern unsigned int pci_probe; +extern unsigned long pirq_table_addr; + +enum pci_bf_sort_state { + pci_bf_sort_default, + pci_force_nobf, + pci_force_bf, + pci_dmi_bf, +}; + +/* pci-i386.c */ + +extern unsigned int pcibios_max_latency; + +void pcibios_resource_survey(void); + +/* pci-pc.c */ + +extern int pcibios_last_bus; +extern struct pci_bus *pci_root_bus; +extern struct pci_ops pci_root_ops; + +/* pci-irq.c */ + +struct irq_info { + u8 bus, devfn; /* Bus, device and function */ + struct { + u8 link; /* IRQ line ID, chipset dependent, + 0 = not routed */ + u16 bitmap; /* Available IRQs */ + } __attribute__((packed)) irq[4]; + u8 slot; /* Slot number, 0=onboard */ + u8 rfu; +} __attribute__((packed)); + +struct irq_routing_table { + u32 signature; /* PIRQ_SIGNATURE should be here */ + u16 version; /* PIRQ_VERSION */ + u16 size; /* Table size in bytes */ + u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */ + u16 exclusive_irqs; /* IRQs devoted exclusively to + PCI usage */ + u16 rtr_vendor, rtr_device; /* Vendor and device ID of + interrupt router */ + u32 miniport_data; /* Crap */ + u8 rfu[11]; + u8 checksum; /* Modulo 256 checksum must give 0 */ + struct irq_info slots[0]; +} __attribute__((packed)); + +extern unsigned int pcibios_irq_mask; + +extern int pcibios_scanned; +extern spinlock_t pci_config_lock; + +extern int (*pcibios_enable_irq)(struct pci_dev *dev); +extern void (*pcibios_disable_irq)(struct pci_dev *dev); + +struct pci_raw_ops { + int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 *val); + int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 val); +}; + +extern struct pci_raw_ops *raw_pci_ops; +extern struct pci_raw_ops *raw_pci_ext_ops; + +extern struct pci_raw_ops pci_direct_conf1; +extern bool port_cf9_safe; + +/* arch_initcall level */ +extern int pci_direct_probe(void); +extern void pci_direct_init(int type); +extern void pci_pcbios_init(void); +extern int pci_olpc_init(void); +extern void __init dmi_check_pciprobe(void); +extern void __init dmi_check_skip_isa_align(void); + +/* some common used subsys_initcalls */ +extern int __init pci_acpi_init(void); +extern int __init pcibios_irq_init(void); +extern int __init pci_visws_init(void); +extern int __init pci_numaq_init(void); +extern int __init pcibios_init(void); + +/* pci-mmconfig.c */ + +extern int __init pci_mmcfg_arch_init(void); +extern void __init pci_mmcfg_arch_free(void); + +/* + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space + * on their northbrige except through the * %eax register. As such, you MUST + * NOT use normal IOMEM accesses, you need to only use the magic mmio-config + * accessor functions. + * In fact just use pci_config_*, nothing else please. + */ +static inline unsigned char mmio_config_readb(void __iomem *pos) +{ + u8 val; + asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos)); + return val; +} + +static inline unsigned short mmio_config_readw(void __iomem *pos) +{ + u16 val; + asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos)); + return val; +} + +static inline unsigned int mmio_config_readl(void __iomem *pos) +{ + u32 val; + asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos)); + return val; +} + +static inline void mmio_config_writeb(void __iomem *pos, u8 val) +{ + asm volatile("movb %%al,(%1)" : : "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writew(void __iomem *pos, u16 val) +{ + asm volatile("movw %%ax,(%1)" : : "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writel(void __iomem *pos, u32 val) +{ + asm volatile("movl %%eax,(%1)" : : "a" (val), "r" (pos) : "memory"); +} diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index efc2f36..666e43d 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c @@ -13,8 +13,7 @@ #include <asm/msr.h> #include <asm/acpi.h> #include <asm/mmconfig.h> - -#include "../pci/pci.h" +#include <asm/pci_x86.h> struct pci_hostbridge_probe { u32 bus; diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index f39e871..16b2c74 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -12,6 +12,7 @@ #include <asm/proto.h> #include <asm/reboot_fixups.h> #include <asm/reboot.h> +#include <asm/pci_x86.h> #ifdef CONFIG_X86_32 # include <linux/dmi.h> @@ -22,8 +23,6 @@ #endif #include <mach_ipi.h> -#include "../pci/pci.h" - /* * Power off function, if any diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 1d88d2b..9e5752f 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -4,7 +4,7 @@ #include <linux/irq.h> #include <linux/dmi.h> #include <asm/numa.h> -#include "pci.h" +#include <asm/pci_x86.h> struct pci_root_info { char *name; diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index f27eada..5f23426 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c @@ -2,7 +2,7 @@ #include <linux/pci.h> #include <linux/topology.h> #include <linux/cpu.h> -#include "pci.h" +#include <asm/pci_x86.h> #ifdef CONFIG_X86_64 #include <asm/pci-direct.h> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index bb1a01f..62ddb73 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -14,8 +14,7 @@ #include <asm/segment.h> #include <asm/io.h> #include <asm/smp.h> - -#include "pci.h" +#include <asm/pci_x86.h> unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | PCI_PROBE_MMCONF; diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c index 9a5af6c..bd13c3e 100644 --- a/arch/x86/pci/direct.c +++ b/arch/x86/pci/direct.c @@ -5,7 +5,7 @@ #include <linux/pci.h> #include <linux/init.h> #include <linux/dmi.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * Functions for accessing PCI base (first 256 bytes) and extended diff --git a/arch/x86/pci/early.c b/arch/x86/pci/early.c index 86631cc..f6adf2c 100644 --- a/arch/x86/pci/early.c +++ b/arch/x86/pci/early.c @@ -2,7 +2,7 @@ #include <linux/pci.h> #include <asm/pci-direct.h> #include <asm/io.h> -#include "pci.h" +#include <asm/pci_x86.h> /* Direct PCI access. This is used for PCI accesses in early boot before the PCI subsystem works. */ diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 2051dc9..7d388d5 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -6,8 +6,7 @@ #include <linux/dmi.h> #include <linux/pci.h> #include <linux/init.h> -#include "pci.h" - +#include <asm/pci_x86.h> static void __devinit pci_fixup_i450nx(struct pci_dev *d) { diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 844df0c..e51bf2c 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -34,8 +34,8 @@ #include <asm/pat.h> #include <asm/e820.h> +#include <asm/pci_x86.h> -#include "pci.h" static int skip_isa_ioresource_align(struct pci_dev *dev) { diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c index d6c950f..bec3b04 100644 --- a/arch/x86/pci/init.c +++ b/arch/x86/pci/init.c @@ -1,6 +1,6 @@ #include <linux/pci.h> #include <linux/init.h> -#include "pci.h" +#include <asm/pci_x86.h> /* arch_initcall has too random ordering, so call the initializers in the right sequence from here. */ diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index bf69dbe..373b9af 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c @@ -16,8 +16,7 @@ #include <asm/io_apic.h> #include <linux/irq.h> #include <linux/acpi.h> - -#include "pci.h" +#include <asm/pci_x86.h> #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24)) #define PIRQ_VERSION 0x0100 diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c index b722dd4..f1065b1 100644 --- a/arch/x86/pci/legacy.c +++ b/arch/x86/pci/legacy.c @@ -3,7 +3,7 @@ */ #include <linux/init.h> #include <linux/pci.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * Discover remaining PCI buses in case there are peer host bridges. diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 654a223..89bf924 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c @@ -15,8 +15,7 @@ #include <linux/acpi.h> #include <linux/bitmap.h> #include <asm/e820.h> - -#include "pci.h" +#include <asm/pci_x86.h> /* aperture is up to 256MB but BIOS may reserve less */ #define MMCONFIG_APER_MIN (2 * 1024*1024) diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c index f3c761d..8b2d561 100644 --- a/arch/x86/pci/mmconfig_32.c +++ b/arch/x86/pci/mmconfig_32.c @@ -13,7 +13,7 @@ #include <linux/init.h> #include <linux/acpi.h> #include <asm/e820.h> -#include "pci.h" +#include <asm/pci_x86.h> /* Assume systems with more busses have correct MCFG */ #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG)) diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c index a199416..30007ff 100644 --- a/arch/x86/pci/mmconfig_64.c +++ b/arch/x86/pci/mmconfig_64.c @@ -10,8 +10,7 @@ #include <linux/acpi.h> #include <linux/bitmap.h> #include <asm/e820.h> - -#include "pci.h" +#include <asm/pci_x86.h> /* Static virtual mapping of the MMCONFIG aperture */ struct mmcfg_virt { diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c index 1177845..2089354 100644 --- a/arch/x86/pci/numaq_32.c +++ b/arch/x86/pci/numaq_32.c @@ -7,7 +7,7 @@ #include <linux/nodemask.h> #include <mach_apic.h> #include <asm/mpspec.h> -#include "pci.h" +#include <asm/pci_x86.h> #define XQUAD_PORTIO_BASE 0xfe400000 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ diff --git a/arch/x86/pci/olpc.c b/arch/x86/pci/olpc.c index e11e9e8..b889d82 100644 --- a/arch/x86/pci/olpc.c +++ b/arch/x86/pci/olpc.c @@ -29,7 +29,7 @@ #include <linux/init.h> #include <asm/olpc.h> #include <asm/geode.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * In the tables below, the first two line (8 longwords) are the diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c index 37472fc..b82cae9 100644 --- a/arch/x86/pci/pcbios.c +++ b/arch/x86/pci/pcbios.c @@ -6,9 +6,8 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/uaccess.h> -#include "pci.h" -#include "pci-functions.h" - +#include <asm/pci_x86.h> +#include <asm/mach-default/pci-functions.h> /* BIOS32 signature: "_32_" */ #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h deleted file mode 100644 index 1959018..0000000 --- a/arch/x86/pci/pci.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Low-Level PCI Access for i386 machines. - * - * (c) 1999 Martin Mares <mj@ucw.cz> - */ - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -#define PCI_PROBE_BIOS 0x0001 -#define PCI_PROBE_CONF1 0x0002 -#define PCI_PROBE_CONF2 0x0004 -#define PCI_PROBE_MMCONF 0x0008 -#define PCI_PROBE_MASK 0x000f -#define PCI_PROBE_NOEARLY 0x0010 - -#define PCI_NO_CHECKS 0x0400 -#define PCI_USE_PIRQ_MASK 0x0800 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 -#define PCI_ASSIGN_ALL_BUSSES 0x4000 -#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 -#define PCI_USE__CRS 0x10000 -#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000 -#define PCI_HAS_IO_ECS 0x40000 -#define PCI_NOASSIGN_ROMS 0x80000 - -extern unsigned int pci_probe; -extern unsigned long pirq_table_addr; - -enum pci_bf_sort_state { - pci_bf_sort_default, - pci_force_nobf, - pci_force_bf, - pci_dmi_bf, -}; - -/* pci-i386.c */ - -extern unsigned int pcibios_max_latency; - -void pcibios_resource_survey(void); - -/* pci-pc.c */ - -extern int pcibios_last_bus; -extern struct pci_bus *pci_root_bus; -extern struct pci_ops pci_root_ops; - -/* pci-irq.c */ - -struct irq_info { - u8 bus, devfn; /* Bus, device and function */ - struct { - u8 link; /* IRQ line ID, chipset dependent, 0=not routed */ - u16 bitmap; /* Available IRQs */ - } __attribute__((packed)) irq[4]; - u8 slot; /* Slot number, 0=onboard */ - u8 rfu; -} __attribute__((packed)); - -struct irq_routing_table { - u32 signature; /* PIRQ_SIGNATURE should be here */ - u16 version; /* PIRQ_VERSION */ - u16 size; /* Table size in bytes */ - u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */ - u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */ - u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */ - u32 miniport_data; /* Crap */ - u8 rfu[11]; - u8 checksum; /* Modulo 256 checksum must give zero */ - struct irq_info slots[0]; -} __attribute__((packed)); - -extern unsigned int pcibios_irq_mask; - -extern int pcibios_scanned; -extern spinlock_t pci_config_lock; - -extern int (*pcibios_enable_irq)(struct pci_dev *dev); -extern void (*pcibios_disable_irq)(struct pci_dev *dev); - -struct pci_raw_ops { - int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 *val); - int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 val); -}; - -extern struct pci_raw_ops *raw_pci_ops; -extern struct pci_raw_ops *raw_pci_ext_ops; - -extern struct pci_raw_ops pci_direct_conf1; -extern bool port_cf9_safe; - -/* arch_initcall level */ -extern int pci_direct_probe(void); -extern void pci_direct_init(int type); -extern void pci_pcbios_init(void); -extern int pci_olpc_init(void); -extern void __init dmi_check_pciprobe(void); -extern void __init dmi_check_skip_isa_align(void); - -/* some common used subsys_initcalls */ -extern int __init pci_acpi_init(void); -extern int __init pcibios_irq_init(void); -extern int __init pci_visws_init(void); -extern int __init pci_numaq_init(void); -extern int __init pcibios_init(void); - -/* pci-mmconfig.c */ - -extern int __init pci_mmcfg_arch_init(void); -extern void __init pci_mmcfg_arch_free(void); - -/* - * AMD Fam10h CPUs are buggy, and cannot access MMIO config space - * on their northbrige except through the * %eax register. As such, you MUST - * NOT use normal IOMEM accesses, you need to only use the magic mmio-config - * accessor functions. - * In fact just use pci_config_*, nothing else please. - */ -static inline unsigned char mmio_config_readb(void __iomem *pos) -{ - u8 val; - asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos)); - return val; -} - -static inline unsigned short mmio_config_readw(void __iomem *pos) -{ - u16 val; - asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos)); - return val; -} - -static inline unsigned int mmio_config_readl(void __iomem *pos) -{ - u32 val; - asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos)); - return val; -} - -static inline void mmio_config_writeb(void __iomem *pos, u8 val) -{ - asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writew(void __iomem *pos, u16 val) -{ - asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writel(void __iomem *pos, u32 val) -{ - asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c index 42f4cb1..16d0c0e 100644 --- a/arch/x86/pci/visws.c +++ b/arch/x86/pci/visws.c @@ -9,11 +9,10 @@ #include <linux/init.h> #include <asm/setup.h> +#include <asm/pci_x86.h> #include <asm/visws/cobalt.h> #include <asm/visws/lithium.h> -#include "pci.h" - static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; } static void pci_visws_disable_irq(struct pci_dev *dev) { } -- 1.5.5.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-27 13:02 [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h Jaswinder Singh Rajput @ 2008-12-29 6:57 ` Alexey Dobriyan 2008-12-29 7:58 ` Jaswinder Singh Rajput 2008-12-29 12:12 ` Ingo Molnar 1 sibling, 1 reply; 14+ messages in thread From: Alexey Dobriyan @ 2008-12-29 6:57 UTC (permalink / raw) To: Jaswinder Singh Rajput; +Cc: Ingo Molnar, x86 maintainers, LKML, mj On Sat, Dec 27, 2008 at 06:32:28PM +0530, Jaswinder Singh Rajput wrote: > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h And this is done for what? ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 6:57 ` Alexey Dobriyan @ 2008-12-29 7:58 ` Jaswinder Singh Rajput 2008-12-29 8:48 ` Alexey Dobriyan 2008-12-29 10:07 ` Ingo Molnar 0 siblings, 2 replies; 14+ messages in thread From: Jaswinder Singh Rajput @ 2008-12-29 7:58 UTC (permalink / raw) To: Alexey Dobriyan; +Cc: Ingo Molnar, x86 maintainers, LKML, mj On Mon, 2008-12-29 at 09:57 +0300, Alexey Dobriyan wrote: > On Sat, Dec 27, 2008 at 06:32:28PM +0530, Jaswinder Singh Rajput wrote: > > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h > > And this is done for what? Don't you think arch/x86/pci/pci.h looks ugly it should be in arch/x86/incluse/asm directory ? It was suggested by Ingo : http://marc.info/?l=linux-kernel&m=123037395221921&w=2 I think Ingo will have more valid reasons to satisfy your curiousity ;-) Thank you, JSR ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 7:58 ` Jaswinder Singh Rajput @ 2008-12-29 8:48 ` Alexey Dobriyan 2008-12-29 10:01 ` H. Peter Anvin 2008-12-29 10:07 ` Ingo Molnar 1 sibling, 1 reply; 14+ messages in thread From: Alexey Dobriyan @ 2008-12-29 8:48 UTC (permalink / raw) To: Jaswinder Singh Rajput; +Cc: Ingo Molnar, x86 maintainers, LKML, mj On Mon, Dec 29, 2008 at 01:28:58PM +0530, Jaswinder Singh Rajput wrote: > On Mon, 2008-12-29 at 09:57 +0300, Alexey Dobriyan wrote: > > On Sat, Dec 27, 2008 at 06:32:28PM +0530, Jaswinder Singh Rajput wrote: > > > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h > > > > And this is done for what? > > Don't you think arch/x86/pci/pci.h looks ugly it should be in > arch/x86/incluse/asm directory ? It was #include "../pci/pci.h" which can look ugly, not full path. Anyway, you want to put you question into changelog? > It was suggested by Ingo : > http://marc.info/?l=linux-kernel&m=123037395221921&w=2 > > I think Ingo will have more valid reasons to satisfy your curiousity ;-) So you don't actually have an opinion? Why are you sending patch then? > could you send another patch that moves arch/x86/pci/pci.h to > arch/x86/include/asm/pci_x86.h ^^^ ^^^ Or should it be arch/x86/include/asm/pci.h ? ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 8:48 ` Alexey Dobriyan @ 2008-12-29 10:01 ` H. Peter Anvin 0 siblings, 0 replies; 14+ messages in thread From: H. Peter Anvin @ 2008-12-29 10:01 UTC (permalink / raw) To: Alexey Dobriyan Cc: Jaswinder Singh Rajput, Ingo Molnar, x86 maintainers, LKML, mj Alexey Dobriyan wrote: > > So you don't actually have an opinion? Why are you sending patch then? > > > could you send another patch that moves arch/x86/pci/pci.h to > > arch/x86/include/asm/pci_x86.h > ^^^ ^^^ > Or should it be arch/x86/include/asm/pci.h ? > <asm/pci.h> already exists, though. This file contains definitions private to the x86 implementation, whereas <asm/pci.h> contains arch implementations of panarchitectural interfaces. The reason for moving it was to avoid ugly ../ paths. -hpa ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 7:58 ` Jaswinder Singh Rajput 2008-12-29 8:48 ` Alexey Dobriyan @ 2008-12-29 10:07 ` Ingo Molnar 1 sibling, 0 replies; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 10:07 UTC (permalink / raw) To: Jaswinder Singh Rajput; +Cc: Alexey Dobriyan, x86 maintainers, LKML, mj * Jaswinder Singh Rajput <jaswinder@infradead.org> wrote: > On Mon, 2008-12-29 at 09:57 +0300, Alexey Dobriyan wrote: > > On Sat, Dec 27, 2008 at 06:32:28PM +0530, Jaswinder Singh Rajput wrote: > > > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h > > > > And this is done for what? > > Don't you think arch/x86/pci/pci.h looks ugly it should be in > arch/x86/incluse/asm directory ? > > It was suggested by Ingo : > http://marc.info/?l=linux-kernel&m=123037395221921&w=2 > > I think Ingo will have more valid reasons to satisfy your curiousity ;-) yes - the reason why i asked for that is that asm/pci.h already exists, and it is included in generic code (via linux/include/pci.h) and provides public PCI interfaces. pci_x86.h (a'ka arch/x86/pci/pci.h) includes lowlevel x86-only internals, included from a handful PCI arch/x86/ platform .c files. Ingo ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-27 13:02 [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h Jaswinder Singh Rajput 2008-12-29 6:57 ` Alexey Dobriyan @ 2008-12-29 12:12 ` Ingo Molnar 2008-12-29 12:22 ` Ingo Molnar 1 sibling, 1 reply; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 12:12 UTC (permalink / raw) To: Jaswinder Singh Rajput; +Cc: x86 maintainers, LKML, mj * Jaswinder Singh Rajput <jaswinder@infradead.org> wrote: > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h > > Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP > > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> > --- > arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ > arch/x86/kernel/mmconf-fam10h_64.c | 3 +- > arch/x86/kernel/reboot.c | 3 +- > arch/x86/pci/acpi.c | 2 +- > arch/x86/pci/amd_bus.c | 2 +- > arch/x86/pci/common.c | 3 +- > arch/x86/pci/direct.c | 2 +- > arch/x86/pci/early.c | 2 +- > arch/x86/pci/fixup.c | 3 +- > arch/x86/pci/i386.c | 2 +- > arch/x86/pci/init.c | 2 +- > arch/x86/pci/irq.c | 3 +- > arch/x86/pci/legacy.c | 2 +- > arch/x86/pci/mmconfig-shared.c | 3 +- > arch/x86/pci/mmconfig_32.c | 2 +- > arch/x86/pci/mmconfig_64.c | 3 +- > arch/x86/pci/numaq_32.c | 2 +- > arch/x86/pci/olpc.c | 2 +- > arch/x86/pci/pcbios.c | 5 +- > arch/x86/pci/pci.h | 162 ----------------------------------- > arch/x86/pci/visws.c | 3 +- > 21 files changed, 185 insertions(+), 191 deletions(-) > create mode 100644 arch/x86/include/asm/pci_x86.h > delete mode 100644 arch/x86/pci/pci.h applied to tip/x86/cleanups (with an expanded changelog), thanks! Ingo ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 12:12 ` Ingo Molnar @ 2008-12-29 12:22 ` Ingo Molnar 2008-12-29 12:41 ` Jaswinder Singh Rajput 2008-12-29 12:54 ` Sam Ravnborg 0 siblings, 2 replies; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 12:22 UTC (permalink / raw) To: Jaswinder Singh Rajput; +Cc: x86 maintainers, LKML, mj * Ingo Molnar <mingo@elte.hu> wrote: > > * Jaswinder Singh Rajput <jaswinder@infradead.org> wrote: > > > Impact: cleanup, arch/x86/pci/pci.h -> arch/x86/include/asm/pci_x86.h > > > > Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP > > > > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> > > --- > > arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ > > arch/x86/kernel/mmconf-fam10h_64.c | 3 +- > > arch/x86/kernel/reboot.c | 3 +- > > arch/x86/pci/acpi.c | 2 +- > > arch/x86/pci/amd_bus.c | 2 +- > > arch/x86/pci/common.c | 3 +- > > arch/x86/pci/direct.c | 2 +- > > arch/x86/pci/early.c | 2 +- > > arch/x86/pci/fixup.c | 3 +- > > arch/x86/pci/i386.c | 2 +- > > arch/x86/pci/init.c | 2 +- > > arch/x86/pci/irq.c | 3 +- > > arch/x86/pci/legacy.c | 2 +- > > arch/x86/pci/mmconfig-shared.c | 3 +- > > arch/x86/pci/mmconfig_32.c | 2 +- > > arch/x86/pci/mmconfig_64.c | 3 +- > > arch/x86/pci/numaq_32.c | 2 +- > > arch/x86/pci/olpc.c | 2 +- > > arch/x86/pci/pcbios.c | 5 +- > > arch/x86/pci/pci.h | 162 ----------------------------------- > > arch/x86/pci/visws.c | 3 +- > > 21 files changed, 185 insertions(+), 191 deletions(-) > > create mode 100644 arch/x86/include/asm/pci_x86.h > > delete mode 100644 arch/x86/pci/pci.h > > applied to tip/x86/cleanups (with an expanded changelog), thanks! btw., you missed to update a couple of places - pci/pci.h was used outside of arch/x86 as well. Updated patch below. Ingo ----------------> >From 54a090abe7cb85c724305124f57d2570b7e9adf1 Mon Sep 17 00:00:00 2001 From: Jaswinder Singh Rajput <jaswinder@infradead.org> Date: Sat, 27 Dec 2008 18:32:28 +0530 Subject: [PATCH] x86, pci: move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h Impact: cleanup Now that arch/x86/pci/pci.h is used in a number of other places as well, move the lowlevel x86 pci definitions into the architecture include files. (not to be confused with the existing arch/x86/include/asm/pci.h file, which provides public details about x86 PCI) Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> --- arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ arch/x86/kernel/mmconf-fam10h_64.c | 3 +- arch/x86/kernel/reboot.c | 3 +- arch/x86/pci/acpi.c | 2 +- arch/x86/pci/amd_bus.c | 2 +- arch/x86/pci/common.c | 3 +- arch/x86/pci/direct.c | 2 +- arch/x86/pci/early.c | 2 +- arch/x86/pci/fixup.c | 3 +- arch/x86/pci/i386.c | 2 +- arch/x86/pci/init.c | 2 +- arch/x86/pci/irq.c | 3 +- arch/x86/pci/legacy.c | 2 +- arch/x86/pci/mmconfig-shared.c | 3 +- arch/x86/pci/mmconfig_32.c | 2 +- arch/x86/pci/mmconfig_64.c | 3 +- arch/x86/pci/numaq_32.c | 2 +- arch/x86/pci/olpc.c | 2 +- arch/x86/pci/pcbios.c | 5 +- arch/x86/pci/pci.h | 162 ----------------------------------- arch/x86/pci/visws.c | 3 +- drivers/pci/hotplug/cpqphp_core.c | 2 +- drivers/pci/hotplug/cpqphp_pci.c | 2 +- drivers/pci/hotplug/ibmphp_core.c | 2 +- 24 files changed, 188 insertions(+), 194 deletions(-) diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h new file mode 100644 index 0000000..e60fd3e --- /dev/null +++ b/arch/x86/include/asm/pci_x86.h @@ -0,0 +1,165 @@ +/* + * Low-Level PCI Access for i386 machines. + * + * (c) 1999 Martin Mares <mj@ucw.cz> + */ + +#undef DEBUG + +#ifdef DEBUG +#define DBG(x...) printk(x) +#else +#define DBG(x...) +#endif + +#define PCI_PROBE_BIOS 0x0001 +#define PCI_PROBE_CONF1 0x0002 +#define PCI_PROBE_CONF2 0x0004 +#define PCI_PROBE_MMCONF 0x0008 +#define PCI_PROBE_MASK 0x000f +#define PCI_PROBE_NOEARLY 0x0010 + +#define PCI_NO_CHECKS 0x0400 +#define PCI_USE_PIRQ_MASK 0x0800 +#define PCI_ASSIGN_ROMS 0x1000 +#define PCI_BIOS_IRQ_SCAN 0x2000 +#define PCI_ASSIGN_ALL_BUSSES 0x4000 +#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 +#define PCI_USE__CRS 0x10000 +#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000 +#define PCI_HAS_IO_ECS 0x40000 +#define PCI_NOASSIGN_ROMS 0x80000 + +extern unsigned int pci_probe; +extern unsigned long pirq_table_addr; + +enum pci_bf_sort_state { + pci_bf_sort_default, + pci_force_nobf, + pci_force_bf, + pci_dmi_bf, +}; + +/* pci-i386.c */ + +extern unsigned int pcibios_max_latency; + +void pcibios_resource_survey(void); + +/* pci-pc.c */ + +extern int pcibios_last_bus; +extern struct pci_bus *pci_root_bus; +extern struct pci_ops pci_root_ops; + +/* pci-irq.c */ + +struct irq_info { + u8 bus, devfn; /* Bus, device and function */ + struct { + u8 link; /* IRQ line ID, chipset dependent, + 0 = not routed */ + u16 bitmap; /* Available IRQs */ + } __attribute__((packed)) irq[4]; + u8 slot; /* Slot number, 0=onboard */ + u8 rfu; +} __attribute__((packed)); + +struct irq_routing_table { + u32 signature; /* PIRQ_SIGNATURE should be here */ + u16 version; /* PIRQ_VERSION */ + u16 size; /* Table size in bytes */ + u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */ + u16 exclusive_irqs; /* IRQs devoted exclusively to + PCI usage */ + u16 rtr_vendor, rtr_device; /* Vendor and device ID of + interrupt router */ + u32 miniport_data; /* Crap */ + u8 rfu[11]; + u8 checksum; /* Modulo 256 checksum must give 0 */ + struct irq_info slots[0]; +} __attribute__((packed)); + +extern unsigned int pcibios_irq_mask; + +extern int pcibios_scanned; +extern spinlock_t pci_config_lock; + +extern int (*pcibios_enable_irq)(struct pci_dev *dev); +extern void (*pcibios_disable_irq)(struct pci_dev *dev); + +struct pci_raw_ops { + int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 *val); + int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn, + int reg, int len, u32 val); +}; + +extern struct pci_raw_ops *raw_pci_ops; +extern struct pci_raw_ops *raw_pci_ext_ops; + +extern struct pci_raw_ops pci_direct_conf1; +extern bool port_cf9_safe; + +/* arch_initcall level */ +extern int pci_direct_probe(void); +extern void pci_direct_init(int type); +extern void pci_pcbios_init(void); +extern int pci_olpc_init(void); +extern void __init dmi_check_pciprobe(void); +extern void __init dmi_check_skip_isa_align(void); + +/* some common used subsys_initcalls */ +extern int __init pci_acpi_init(void); +extern int __init pcibios_irq_init(void); +extern int __init pci_visws_init(void); +extern int __init pci_numaq_init(void); +extern int __init pcibios_init(void); + +/* pci-mmconfig.c */ + +extern int __init pci_mmcfg_arch_init(void); +extern void __init pci_mmcfg_arch_free(void); + +/* + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space + * on their northbrige except through the * %eax register. As such, you MUST + * NOT use normal IOMEM accesses, you need to only use the magic mmio-config + * accessor functions. + * In fact just use pci_config_*, nothing else please. + */ +static inline unsigned char mmio_config_readb(void __iomem *pos) +{ + u8 val; + asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos)); + return val; +} + +static inline unsigned short mmio_config_readw(void __iomem *pos) +{ + u16 val; + asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos)); + return val; +} + +static inline unsigned int mmio_config_readl(void __iomem *pos) +{ + u32 val; + asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos)); + return val; +} + +static inline void mmio_config_writeb(void __iomem *pos, u8 val) +{ + asm volatile("movb %%al,(%1)" : : "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writew(void __iomem *pos, u16 val) +{ + asm volatile("movw %%ax,(%1)" : : "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writel(void __iomem *pos, u32 val) +{ + asm volatile("movl %%eax,(%1)" : : "a" (val), "r" (pos) : "memory"); +} diff --git a/arch/x86/kernel/mmconf-fam10h_64.c b/arch/x86/kernel/mmconf-fam10h_64.c index efc2f36..666e43d 100644 --- a/arch/x86/kernel/mmconf-fam10h_64.c +++ b/arch/x86/kernel/mmconf-fam10h_64.c @@ -13,8 +13,7 @@ #include <asm/msr.h> #include <asm/acpi.h> #include <asm/mmconfig.h> - -#include "../pci/pci.h" +#include <asm/pci_x86.h> struct pci_hostbridge_probe { u32 bus; diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c index b165eb0..a90913c 100644 --- a/arch/x86/kernel/reboot.c +++ b/arch/x86/kernel/reboot.c @@ -12,6 +12,7 @@ #include <asm/proto.h> #include <asm/reboot_fixups.h> #include <asm/reboot.h> +#include <asm/pci_x86.h> #ifdef CONFIG_X86_32 # include <linux/dmi.h> @@ -22,8 +23,6 @@ #endif #include <mach_ipi.h> -#include "../pci/pci.h" - /* * Power off function, if any diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index 1d88d2b..9e5752f 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c @@ -4,7 +4,7 @@ #include <linux/irq.h> #include <linux/dmi.h> #include <asm/numa.h> -#include "pci.h" +#include <asm/pci_x86.h> struct pci_root_info { char *name; diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index 22e0576..9bb0982 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c @@ -2,7 +2,7 @@ #include <linux/pci.h> #include <linux/topology.h> #include <linux/cpu.h> -#include "pci.h" +#include <asm/pci_x86.h> #ifdef CONFIG_X86_64 #include <asm/pci-direct.h> diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index bb1a01f..62ddb73 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -14,8 +14,7 @@ #include <asm/segment.h> #include <asm/io.h> #include <asm/smp.h> - -#include "pci.h" +#include <asm/pci_x86.h> unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | PCI_PROBE_MMCONF; diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c index 9a5af6c..bd13c3e 100644 --- a/arch/x86/pci/direct.c +++ b/arch/x86/pci/direct.c @@ -5,7 +5,7 @@ #include <linux/pci.h> #include <linux/init.h> #include <linux/dmi.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * Functions for accessing PCI base (first 256 bytes) and extended diff --git a/arch/x86/pci/early.c b/arch/x86/pci/early.c index 86631cc..f6adf2c 100644 --- a/arch/x86/pci/early.c +++ b/arch/x86/pci/early.c @@ -2,7 +2,7 @@ #include <linux/pci.h> #include <asm/pci-direct.h> #include <asm/io.h> -#include "pci.h" +#include <asm/pci_x86.h> /* Direct PCI access. This is used for PCI accesses in early boot before the PCI subsystem works. */ diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 2051dc9..7d388d5 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -6,8 +6,7 @@ #include <linux/dmi.h> #include <linux/pci.h> #include <linux/init.h> -#include "pci.h" - +#include <asm/pci_x86.h> static void __devinit pci_fixup_i450nx(struct pci_dev *d) { diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 844df0c..e51bf2c 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -34,8 +34,8 @@ #include <asm/pat.h> #include <asm/e820.h> +#include <asm/pci_x86.h> -#include "pci.h" static int skip_isa_ioresource_align(struct pci_dev *dev) { diff --git a/arch/x86/pci/init.c b/arch/x86/pci/init.c index d6c950f..bec3b04 100644 --- a/arch/x86/pci/init.c +++ b/arch/x86/pci/init.c @@ -1,6 +1,6 @@ #include <linux/pci.h> #include <linux/init.h> -#include "pci.h" +#include <asm/pci_x86.h> /* arch_initcall has too random ordering, so call the initializers in the right sequence from here. */ diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c index bf69dbe..373b9af 100644 --- a/arch/x86/pci/irq.c +++ b/arch/x86/pci/irq.c @@ -16,8 +16,7 @@ #include <asm/io_apic.h> #include <linux/irq.h> #include <linux/acpi.h> - -#include "pci.h" +#include <asm/pci_x86.h> #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24)) #define PIRQ_VERSION 0x0100 diff --git a/arch/x86/pci/legacy.c b/arch/x86/pci/legacy.c index b722dd4..f1065b1 100644 --- a/arch/x86/pci/legacy.c +++ b/arch/x86/pci/legacy.c @@ -3,7 +3,7 @@ */ #include <linux/init.h> #include <linux/pci.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * Discover remaining PCI buses in case there are peer host bridges. diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 654a223..89bf924 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c @@ -15,8 +15,7 @@ #include <linux/acpi.h> #include <linux/bitmap.h> #include <asm/e820.h> - -#include "pci.h" +#include <asm/pci_x86.h> /* aperture is up to 256MB but BIOS may reserve less */ #define MMCONFIG_APER_MIN (2 * 1024*1024) diff --git a/arch/x86/pci/mmconfig_32.c b/arch/x86/pci/mmconfig_32.c index f3c761d..8b2d561 100644 --- a/arch/x86/pci/mmconfig_32.c +++ b/arch/x86/pci/mmconfig_32.c @@ -13,7 +13,7 @@ #include <linux/init.h> #include <linux/acpi.h> #include <asm/e820.h> -#include "pci.h" +#include <asm/pci_x86.h> /* Assume systems with more busses have correct MCFG */ #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG)) diff --git a/arch/x86/pci/mmconfig_64.c b/arch/x86/pci/mmconfig_64.c index a199416..30007ff 100644 --- a/arch/x86/pci/mmconfig_64.c +++ b/arch/x86/pci/mmconfig_64.c @@ -10,8 +10,7 @@ #include <linux/acpi.h> #include <linux/bitmap.h> #include <asm/e820.h> - -#include "pci.h" +#include <asm/pci_x86.h> /* Static virtual mapping of the MMCONFIG aperture */ struct mmcfg_virt { diff --git a/arch/x86/pci/numaq_32.c b/arch/x86/pci/numaq_32.c index 1177845..2089354 100644 --- a/arch/x86/pci/numaq_32.c +++ b/arch/x86/pci/numaq_32.c @@ -7,7 +7,7 @@ #include <linux/nodemask.h> #include <mach_apic.h> #include <asm/mpspec.h> -#include "pci.h" +#include <asm/pci_x86.h> #define XQUAD_PORTIO_BASE 0xfe400000 #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ diff --git a/arch/x86/pci/olpc.c b/arch/x86/pci/olpc.c index e11e9e8..b889d82 100644 --- a/arch/x86/pci/olpc.c +++ b/arch/x86/pci/olpc.c @@ -29,7 +29,7 @@ #include <linux/init.h> #include <asm/olpc.h> #include <asm/geode.h> -#include "pci.h" +#include <asm/pci_x86.h> /* * In the tables below, the first two line (8 longwords) are the diff --git a/arch/x86/pci/pcbios.c b/arch/x86/pci/pcbios.c index 37472fc..b82cae9 100644 --- a/arch/x86/pci/pcbios.c +++ b/arch/x86/pci/pcbios.c @@ -6,9 +6,8 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/uaccess.h> -#include "pci.h" -#include "pci-functions.h" - +#include <asm/pci_x86.h> +#include <asm/mach-default/pci-functions.h> /* BIOS32 signature: "_32_" */ #define BIOS32_SIGNATURE (('_' << 0) + ('3' << 8) + ('2' << 16) + ('_' << 24)) diff --git a/arch/x86/pci/pci.h b/arch/x86/pci/pci.h deleted file mode 100644 index 1959018..0000000 --- a/arch/x86/pci/pci.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Low-Level PCI Access for i386 machines. - * - * (c) 1999 Martin Mares <mj@ucw.cz> - */ - -#undef DEBUG - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -#define PCI_PROBE_BIOS 0x0001 -#define PCI_PROBE_CONF1 0x0002 -#define PCI_PROBE_CONF2 0x0004 -#define PCI_PROBE_MMCONF 0x0008 -#define PCI_PROBE_MASK 0x000f -#define PCI_PROBE_NOEARLY 0x0010 - -#define PCI_NO_CHECKS 0x0400 -#define PCI_USE_PIRQ_MASK 0x0800 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 -#define PCI_ASSIGN_ALL_BUSSES 0x4000 -#define PCI_CAN_SKIP_ISA_ALIGN 0x8000 -#define PCI_USE__CRS 0x10000 -#define PCI_CHECK_ENABLE_AMD_MMCONF 0x20000 -#define PCI_HAS_IO_ECS 0x40000 -#define PCI_NOASSIGN_ROMS 0x80000 - -extern unsigned int pci_probe; -extern unsigned long pirq_table_addr; - -enum pci_bf_sort_state { - pci_bf_sort_default, - pci_force_nobf, - pci_force_bf, - pci_dmi_bf, -}; - -/* pci-i386.c */ - -extern unsigned int pcibios_max_latency; - -void pcibios_resource_survey(void); - -/* pci-pc.c */ - -extern int pcibios_last_bus; -extern struct pci_bus *pci_root_bus; -extern struct pci_ops pci_root_ops; - -/* pci-irq.c */ - -struct irq_info { - u8 bus, devfn; /* Bus, device and function */ - struct { - u8 link; /* IRQ line ID, chipset dependent, 0=not routed */ - u16 bitmap; /* Available IRQs */ - } __attribute__((packed)) irq[4]; - u8 slot; /* Slot number, 0=onboard */ - u8 rfu; -} __attribute__((packed)); - -struct irq_routing_table { - u32 signature; /* PIRQ_SIGNATURE should be here */ - u16 version; /* PIRQ_VERSION */ - u16 size; /* Table size in bytes */ - u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */ - u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */ - u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */ - u32 miniport_data; /* Crap */ - u8 rfu[11]; - u8 checksum; /* Modulo 256 checksum must give zero */ - struct irq_info slots[0]; -} __attribute__((packed)); - -extern unsigned int pcibios_irq_mask; - -extern int pcibios_scanned; -extern spinlock_t pci_config_lock; - -extern int (*pcibios_enable_irq)(struct pci_dev *dev); -extern void (*pcibios_disable_irq)(struct pci_dev *dev); - -struct pci_raw_ops { - int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 *val); - int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 val); -}; - -extern struct pci_raw_ops *raw_pci_ops; -extern struct pci_raw_ops *raw_pci_ext_ops; - -extern struct pci_raw_ops pci_direct_conf1; -extern bool port_cf9_safe; - -/* arch_initcall level */ -extern int pci_direct_probe(void); -extern void pci_direct_init(int type); -extern void pci_pcbios_init(void); -extern int pci_olpc_init(void); -extern void __init dmi_check_pciprobe(void); -extern void __init dmi_check_skip_isa_align(void); - -/* some common used subsys_initcalls */ -extern int __init pci_acpi_init(void); -extern int __init pcibios_irq_init(void); -extern int __init pci_visws_init(void); -extern int __init pci_numaq_init(void); -extern int __init pcibios_init(void); - -/* pci-mmconfig.c */ - -extern int __init pci_mmcfg_arch_init(void); -extern void __init pci_mmcfg_arch_free(void); - -/* - * AMD Fam10h CPUs are buggy, and cannot access MMIO config space - * on their northbrige except through the * %eax register. As such, you MUST - * NOT use normal IOMEM accesses, you need to only use the magic mmio-config - * accessor functions. - * In fact just use pci_config_*, nothing else please. - */ -static inline unsigned char mmio_config_readb(void __iomem *pos) -{ - u8 val; - asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos)); - return val; -} - -static inline unsigned short mmio_config_readw(void __iomem *pos) -{ - u16 val; - asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos)); - return val; -} - -static inline unsigned int mmio_config_readl(void __iomem *pos) -{ - u32 val; - asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos)); - return val; -} - -static inline void mmio_config_writeb(void __iomem *pos, u8 val) -{ - asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writew(void __iomem *pos, u16 val) -{ - asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writel(void __iomem *pos, u32 val) -{ - asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} diff --git a/arch/x86/pci/visws.c b/arch/x86/pci/visws.c index 42f4cb1..16d0c0e 100644 --- a/arch/x86/pci/visws.c +++ b/arch/x86/pci/visws.c @@ -9,11 +9,10 @@ #include <linux/init.h> #include <asm/setup.h> +#include <asm/pci_x86.h> #include <asm/visws/cobalt.h> #include <asm/visws/lithium.h> -#include "pci.h" - static int pci_visws_enable_irq(struct pci_dev *dev) { return 0; } static void pci_visws_disable_irq(struct pci_dev *dev) { } diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c index 8514c3a..c2e1bcb 100644 --- a/drivers/pci/hotplug/cpqphp_core.c +++ b/drivers/pci/hotplug/cpqphp_core.c @@ -45,7 +45,7 @@ #include "cpqphp.h" #include "cpqphp_nvram.h" -#include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */ +#include <asm/pci_x86.h> /* Global variables */ diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_pci.c index 0902193..df146be 100644 --- a/drivers/pci/hotplug/cpqphp_pci.c +++ b/drivers/pci/hotplug/cpqphp_pci.c @@ -37,7 +37,7 @@ #include "../pci.h" #include "cpqphp.h" #include "cpqphp_nvram.h" -#include "../../../arch/x86/pci/pci.h" /* horrible hack showing how processor dependent we are... */ +#include <asm/pci_x86.h> u8 cpqhp_nic_irq; diff --git a/drivers/pci/hotplug/ibmphp_core.c b/drivers/pci/hotplug/ibmphp_core.c index 633e743..dd18f85 100644 --- a/drivers/pci/hotplug/ibmphp_core.c +++ b/drivers/pci/hotplug/ibmphp_core.c @@ -35,7 +35,7 @@ #include <linux/delay.h> #include <linux/wait.h> #include "../pci.h" -#include "../../../arch/x86/pci/pci.h" /* for struct irq_routing_table */ +#include <asm/pci_x86.h> /* for struct irq_routing_table */ #include "ibmphp.h" #define attn_on(sl) ibmphp_hpc_writeslot (sl, HPC_SLOT_ATTNON) ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 12:22 ` Ingo Molnar @ 2008-12-29 12:41 ` Jaswinder Singh Rajput 2008-12-29 12:54 ` Sam Ravnborg 1 sibling, 0 replies; 14+ messages in thread From: Jaswinder Singh Rajput @ 2008-12-29 12:41 UTC (permalink / raw) To: Ingo Molnar; +Cc: x86 maintainers, LKML, mj Hello Ingo, On Mon, 2008-12-29 at 13:22 +0100, Ingo Molnar wrote: > * Ingo Molnar <mingo@elte.hu> wrote: > > btw., you missed to update a couple of places - pci/pci.h was used outside > of arch/x86 as well. Updated patch below. > Ahh, I will be more careful next time. Thanks for your kindness :-) JSR ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 12:22 ` Ingo Molnar 2008-12-29 12:41 ` Jaswinder Singh Rajput @ 2008-12-29 12:54 ` Sam Ravnborg 2008-12-29 12:59 ` Ingo Molnar 1 sibling, 1 reply; 14+ messages in thread From: Sam Ravnborg @ 2008-12-29 12:54 UTC (permalink / raw) To: Ingo Molnar; +Cc: Jaswinder Singh Rajput, x86 maintainers, LKML, mj > > btw., you missed to update a couple of places - pci/pci.h was used outside > of arch/x86 as well. Updated patch below. > > Ingo > > ----------------> > >From 54a090abe7cb85c724305124f57d2570b7e9adf1 Mon Sep 17 00:00:00 2001 > From: Jaswinder Singh Rajput <jaswinder@infradead.org> > Date: Sat, 27 Dec 2008 18:32:28 +0530 > Subject: [PATCH] x86, pci: move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h > > Impact: cleanup > > Now that arch/x86/pci/pci.h is used in a number of other places as well, > move the lowlevel x86 pci definitions into the architecture include files. > (not to be confused with the existing arch/x86/include/asm/pci.h file, > which provides public details about x86 PCI) > > Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP > > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> > Signed-off-by: Ingo Molnar <mingo@elte.hu> > --- > arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ > arch/x86/kernel/mmconf-fam10h_64.c | 3 +- > arch/x86/kernel/reboot.c | 3 +- > arch/x86/pci/acpi.c | 2 +- > arch/x86/pci/amd_bus.c | 2 +- > arch/x86/pci/common.c | 3 +- > arch/x86/pci/direct.c | 2 +- > arch/x86/pci/early.c | 2 +- > arch/x86/pci/fixup.c | 3 +- > arch/x86/pci/i386.c | 2 +- > arch/x86/pci/init.c | 2 +- > arch/x86/pci/irq.c | 3 +- > arch/x86/pci/legacy.c | 2 +- > arch/x86/pci/mmconfig-shared.c | 3 +- > arch/x86/pci/mmconfig_32.c | 2 +- > arch/x86/pci/mmconfig_64.c | 3 +- > arch/x86/pci/numaq_32.c | 2 +- > arch/x86/pci/olpc.c | 2 +- > arch/x86/pci/pcbios.c | 5 +- > arch/x86/pci/pci.h | 162 ----------------------------------- > arch/x86/pci/visws.c | 3 +- > drivers/pci/hotplug/cpqphp_core.c | 2 +- > drivers/pci/hotplug/cpqphp_pci.c | 2 +- > drivers/pci/hotplug/ibmphp_core.c | 2 +- > 24 files changed, 188 insertions(+), 194 deletions(-) You should teach your script to use: git format-patch -M -B -C With -M -B -C you get a much better picture of what happens when you rename files like in this patch (and copy them). Sam ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 12:54 ` Sam Ravnborg @ 2008-12-29 12:59 ` Ingo Molnar 2008-12-29 13:01 ` Ingo Molnar 0 siblings, 1 reply; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 12:59 UTC (permalink / raw) To: Sam Ravnborg; +Cc: Jaswinder Singh Rajput, x86 maintainers, LKML, mj * Sam Ravnborg <sam@ravnborg.org> wrote: > > > > btw., you missed to update a couple of places - pci/pci.h was used outside > > of arch/x86 as well. Updated patch below. > > > > Ingo > > > > ----------------> > > >From 54a090abe7cb85c724305124f57d2570b7e9adf1 Mon Sep 17 00:00:00 2001 > > From: Jaswinder Singh Rajput <jaswinder@infradead.org> > > Date: Sat, 27 Dec 2008 18:32:28 +0530 > > Subject: [PATCH] x86, pci: move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h > > > > Impact: cleanup > > > > Now that arch/x86/pci/pci.h is used in a number of other places as well, > > move the lowlevel x86 pci definitions into the architecture include files. > > (not to be confused with the existing arch/x86/include/asm/pci.h file, > > which provides public details about x86 PCI) > > > > Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP > > > > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> > > Signed-off-by: Ingo Molnar <mingo@elte.hu> > > --- > > arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ > > arch/x86/kernel/mmconf-fam10h_64.c | 3 +- > > arch/x86/kernel/reboot.c | 3 +- > > arch/x86/pci/acpi.c | 2 +- > > arch/x86/pci/amd_bus.c | 2 +- > > arch/x86/pci/common.c | 3 +- > > arch/x86/pci/direct.c | 2 +- > > arch/x86/pci/early.c | 2 +- > > arch/x86/pci/fixup.c | 3 +- > > arch/x86/pci/i386.c | 2 +- > > arch/x86/pci/init.c | 2 +- > > arch/x86/pci/irq.c | 3 +- > > arch/x86/pci/legacy.c | 2 +- > > arch/x86/pci/mmconfig-shared.c | 3 +- > > arch/x86/pci/mmconfig_32.c | 2 +- > > arch/x86/pci/mmconfig_64.c | 3 +- > > arch/x86/pci/numaq_32.c | 2 +- > > arch/x86/pci/olpc.c | 2 +- > > arch/x86/pci/pcbios.c | 5 +- > > arch/x86/pci/pci.h | 162 ----------------------------------- > > arch/x86/pci/visws.c | 3 +- > > drivers/pci/hotplug/cpqphp_core.c | 2 +- > > drivers/pci/hotplug/cpqphp_pci.c | 2 +- > > drivers/pci/hotplug/ibmphp_core.c | 2 +- > > 24 files changed, 188 insertions(+), 194 deletions(-) > > You should teach your script to use: > git format-patch -M -B -C > > With -M -B -C you get a much better picture of what happens when you > rename files like in this patch (and copy them). you mean: git format-patch --stdout -1 -M -B -C <sha1> (otherwise people trying this out will be faced with git creating all commits way back to the beginnings of time, as patches in their current directory ;-) Ingo ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 12:59 ` Ingo Molnar @ 2008-12-29 13:01 ` Ingo Molnar 2008-12-29 13:25 ` Sam Ravnborg 0 siblings, 1 reply; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 13:01 UTC (permalink / raw) To: Sam Ravnborg; +Cc: Jaswinder Singh Rajput, x86 maintainers, LKML, mj * Ingo Molnar <mingo@elte.hu> wrote: > > * Sam Ravnborg <sam@ravnborg.org> wrote: > > > > > > > btw., you missed to update a couple of places - pci/pci.h was used outside > > > of arch/x86 as well. Updated patch below. > > > > > > Ingo > > > > > > ----------------> > > > >From 54a090abe7cb85c724305124f57d2570b7e9adf1 Mon Sep 17 00:00:00 2001 > > > From: Jaswinder Singh Rajput <jaswinder@infradead.org> > > > Date: Sat, 27 Dec 2008 18:32:28 +0530 > > > Subject: [PATCH] x86, pci: move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h > > > > > > Impact: cleanup > > > > > > Now that arch/x86/pci/pci.h is used in a number of other places as well, > > > move the lowlevel x86 pci definitions into the architecture include files. > > > (not to be confused with the existing arch/x86/include/asm/pci.h file, > > > which provides public details about x86 PCI) > > > > > > Tested on: X86_32_UP, X86_32_SMP and X86_64_SMP > > > > > > Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> > > > Signed-off-by: Ingo Molnar <mingo@elte.hu> > > > --- > > > arch/x86/include/asm/pci_x86.h | 165 ++++++++++++++++++++++++++++++++++++ > > > arch/x86/kernel/mmconf-fam10h_64.c | 3 +- > > > arch/x86/kernel/reboot.c | 3 +- > > > arch/x86/pci/acpi.c | 2 +- > > > arch/x86/pci/amd_bus.c | 2 +- > > > arch/x86/pci/common.c | 3 +- > > > arch/x86/pci/direct.c | 2 +- > > > arch/x86/pci/early.c | 2 +- > > > arch/x86/pci/fixup.c | 3 +- > > > arch/x86/pci/i386.c | 2 +- > > > arch/x86/pci/init.c | 2 +- > > > arch/x86/pci/irq.c | 3 +- > > > arch/x86/pci/legacy.c | 2 +- > > > arch/x86/pci/mmconfig-shared.c | 3 +- > > > arch/x86/pci/mmconfig_32.c | 2 +- > > > arch/x86/pci/mmconfig_64.c | 3 +- > > > arch/x86/pci/numaq_32.c | 2 +- > > > arch/x86/pci/olpc.c | 2 +- > > > arch/x86/pci/pcbios.c | 5 +- > > > arch/x86/pci/pci.h | 162 ----------------------------------- > > > arch/x86/pci/visws.c | 3 +- > > > drivers/pci/hotplug/cpqphp_core.c | 2 +- > > > drivers/pci/hotplug/cpqphp_pci.c | 2 +- > > > drivers/pci/hotplug/ibmphp_core.c | 2 +- > > > 24 files changed, 188 insertions(+), 194 deletions(-) > > > > You should teach your script to use: > > git format-patch -M -B -C > > > > With -M -B -C you get a much better picture of what happens when you > > rename files like in this patch (and copy them). > > you mean: > > git format-patch --stdout -1 -M -B -C <sha1> also, this does not result in a patch that will be applied properly by the usual patch-tools that people use when they pick up patches from email. So i'll just keep my old script ;-) Ingo ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 13:01 ` Ingo Molnar @ 2008-12-29 13:25 ` Sam Ravnborg 2008-12-29 14:10 ` Ingo Molnar 0 siblings, 1 reply; 14+ messages in thread From: Sam Ravnborg @ 2008-12-29 13:25 UTC (permalink / raw) To: Ingo Molnar; +Cc: Jaswinder Singh Rajput, x86 maintainers, LKML, mj > > you mean: > > > > git format-patch --stdout -1 -M -B -C <sha1> > > also, this does not result in a patch that will be applied properly by the > usual patch-tools that people use when they pick up patches from email. So > i'll just keep my old script ;-) I sometimes forget about the stoneage.... Sam ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h 2008-12-29 13:25 ` Sam Ravnborg @ 2008-12-29 14:10 ` Ingo Molnar 0 siblings, 0 replies; 14+ messages in thread From: Ingo Molnar @ 2008-12-29 14:10 UTC (permalink / raw) To: Sam Ravnborg; +Cc: Jaswinder Singh Rajput, x86 maintainers, LKML, mj * Sam Ravnborg <sam@ravnborg.org> wrote: > > > you mean: > > > > > > git format-patch --stdout -1 -M -B -C <sha1> > > > > also, this does not result in a patch that will be applied properly by > > the usual patch-tools that people use when they pick up patches from > > email. So i'll just keep my old script ;-) > > I sometimes forget about the stoneage.... well applying a (throw-away) patch from email for a specific problem is often much handier than to go hunting for git trees and trying to merge them or cherry-pick from them. Even for the Git addicted ;-) Ingo ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2008-12-29 14:11 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2008-12-27 13:02 [PATCH] move arch/x86/pci/pci.h to arch/x86/include/asm/pci_x86.h Jaswinder Singh Rajput 2008-12-29 6:57 ` Alexey Dobriyan 2008-12-29 7:58 ` Jaswinder Singh Rajput 2008-12-29 8:48 ` Alexey Dobriyan 2008-12-29 10:01 ` H. Peter Anvin 2008-12-29 10:07 ` Ingo Molnar 2008-12-29 12:12 ` Ingo Molnar 2008-12-29 12:22 ` Ingo Molnar 2008-12-29 12:41 ` Jaswinder Singh Rajput 2008-12-29 12:54 ` Sam Ravnborg 2008-12-29 12:59 ` Ingo Molnar 2008-12-29 13:01 ` Ingo Molnar 2008-12-29 13:25 ` Sam Ravnborg 2008-12-29 14:10 ` Ingo Molnar
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