Re: [patch] tlb flush_data: replace per_cpu with an array

Ravikiran G Thirumalai
2009-01-13T02:15:20Z

On Tue, Jan 13, 2009 at 12:00:52AM +0100, Ingo Molnar wrote:
>
>
>> With per-cpu areas, locks belonging to different array elements did not
>> end up on the same internode cacheline due to per-node allocation of
>> per-cpu areas, but with a simple array, two locks could end up on the
>> same internode cacheline.
>>
>> Hence, can you please change the padding in smp_flush_state to
>> INTERNODE_CACHE_BYTES (you have to derive this off
>> INTERNODE_CACHE_SHIFT) and align it using
>> ____cacheline_internodealigned_in_smp?
>
>Yes, that matters to vsmp, which has ... 4K node cache-lines.
>
>Note that there's already CONFIG_X86_INTERNODE_CACHE_BYTES which is set
>properly on vsmp.
>
>So ... something like the commit below?
>

Yep. Looks good!

Acked-by: Ravikiran Thirumalai <kiran@scalex86.org>

Thanks,
Kiran