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From: Russell King - ARM Linux <linux@arm.linux.org.uk>
To: Paul Walmsley <paul@pwsan.com>
Cc: linux-arm-kernel@lists.arm.linux.org.uk,
	linux-kernel@vger.kernel.org, Tony Lindgren <tony@atomide.com>,
	linux-omap@vger.kernel.org
Subject: Re: [PATCH A 01/10] OMAP2/3: Add non-CORE DPLL rate set code and M, N programming
Date: Thu, 29 Jan 2009 14:23:03 +0000	[thread overview]
Message-ID: <20090129142303.GA18233@n2100.arm.linux.org.uk> (raw)
In-Reply-To: <20090128021243.7244.6362.stgit@localhost.localdomain>

On Tue, Jan 27, 2009 at 07:12:47PM -0700, Paul Walmsley wrote:
> +/* Non-CORE DPLL rate set code */
> +
> +/*
> + * omap3_noncore_dpll_program - set non-core DPLL M,N values directly
> + * @clk: struct clk * of DPLL to set
> + * @m: DPLL multiplier to set
> + * @n: DPLL divider to set
> + * @freqsel: FREQSEL value to set
> + *
> + * Program the DPLL with the supplied M, N values, and wait for the DPLL to
> + * lock..  Returns -EINVAL upon error, or 0 upon success.
> + */
> +static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
> +{
> +	struct dpll_data *dd;
> +	u32 v;
> +
> +	if (!clk)
> +		return -EINVAL;
> +
> +	dd = clk->dpll_data;
> +	if (!dd)
> +		return -EINVAL;

Final point... this is only called from the function below, which also
checks that clk and clk->dpll_data are both non-NULL.  So these checks
are unnecessary.

> +static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
> +{
> +	u16 freqsel;
> +	struct dpll_data *dd;
> +
> +	if (!clk || !rate)
> +		return -EINVAL;
> +
> +	dd = clk->dpll_data;
> +	if (!dd)
> +		return -EINVAL;
> +
> +	if (rate == omap2_get_dpll_rate(clk))
> +		return 0;
> +
> +	if (dd->last_rounded_rate != rate)
> +		omap2_dpll_round_rate(clk, rate);
> +
> +	if (dd->last_rounded_rate == 0)
> +		return -EINVAL;
> +
> +	freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n);
> +	if (!freqsel)
> +		WARN_ON(1);
> +
> +	omap3_noncore_dpll_program(clk, dd->last_rounded_m, dd->last_rounded_n,
> +				   freqsel);
> +
> +	omap3_dpll_recalc(clk);
> +
> +	return 0;
> +}

  parent reply	other threads:[~2009-01-29 14:23 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-01-28  2:12 [PATCH A 00/10] OMAP clock, A of F: preliminaries Paul Walmsley
2009-01-28  2:12 ` [PATCH A 01/10] OMAP2/3: Add non-CORE DPLL rate set code and M, N programming Paul Walmsley
2009-01-28 22:10   ` Russell King - ARM Linux
2009-01-28 22:26     ` Russell King - ARM Linux
2009-01-29  7:21     ` Paul Walmsley
2009-01-29 14:23   ` Russell King - ARM Linux [this message]
2009-01-30  5:57     ` Paul Walmsley
2009-01-30  8:45       ` Russell King - ARM Linux
2009-01-28  2:12 ` [PATCH A 02/10] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code Paul Walmsley
2009-01-28  2:12 ` [PATCH A 03/10] OMAP24xx clock: add missing SSI L4 interface clock Paul Walmsley
2009-01-28  2:12 ` [PATCH A 04/10] OMAP3: move USBHOST SAR handling from clock framework to powerdomain layer Paul Walmsley
2009-01-28  2:13 ` [PATCH A 05/10] OMAP3 clock: fix 96MHz clocks Paul Walmsley
2009-01-28  2:13 ` [PATCH A 06/10] OMAP2: Fix definition of SGX clock register bits Paul Walmsley
2009-01-28  2:13 ` [PATCH A 07/10] OMAP: Add CSI2 clock struct for handling it with clock API Paul Walmsley
2009-01-28  2:13 ` [PATCH A 08/10] OMAP: Make dpll4_m4_ck programmable with clk_set_rate() Paul Walmsley
2009-01-28  2:13 ` [PATCH A 09/10] OMAP2/3: Remove OMAP_PRM_REGADDR, OMAP_CM_REGADDR Paul Walmsley
2009-01-28 23:28   ` Russell King - ARM Linux
2009-01-29  7:40     ` Paul Walmsley
2009-01-28  2:13 ` [PATCH A 10/10] OMAP2: Implement CPUfreq frequency table based on PRCM table Paul Walmsley

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