public inbox for linux-kernel@vger.kernel.org
 help / color / mirror / Atom feed
From: Andi Kleen <andi@firstfloor.org>
To: akpm@linux-foundation.org, mingo@elte.hu, tglx@linutronix.de,
	hpa@zytor.com, linux-kernel@vger.kernel.org
Subject: [PATCH] [0/9] x86: CMCI: Add support for Intel CMCI
Date: Thu, 12 Feb 2009 13:49:29 +0100 (CET)	[thread overview]
Message-ID: <20090212149.227733077@firstfloor.org> (raw)


Intel CMCI (Corrected Machine Check Interrupt) is a new
feature on Nehalem CPUs. It allows the CPU to trigger
interrupts on corrected machine check events, which allows faster
reaction to them instead of with the traditional 
polling timer.

This is similar to the existing AMD threshold interrupt
feature. I'm reusing some code from this.

In addition it also provides for better handling of machine
check banks shared between CPUs. This is pretty common
on Nehalem class systems, where threads and cores share
some banks with each other.

The series applies on top of the earlier bugfixes
and cleanups series. 

Aimed for 2.6.30. Tested on 2.6.29-rc4, but also
applies to x86 tip as of today.

-Andi

             reply	other threads:[~2009-02-12 12:50 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-02-12 12:49 Andi Kleen [this message]
2009-02-12 12:49 ` [PATCH] [1/9] x86: CMCI: Export MAX_NR_BANKS Andi Kleen
2009-02-12 12:49 ` [PATCH] [2/9] x86: CMCI: Factor out threshold interrupt handler Andi Kleen
2009-02-12 12:49 ` [PATCH] [3/9] x86: CMCI: Avoid potential reentry of threshold interrupt Andi Kleen
2009-02-12 12:49 ` [PATCH] [4/9] x86: MCE: Replace machine check events logged interval with ratelimit Andi Kleen
2009-02-12 12:49 ` [PATCH] [5/9] x86: CMCI: Use polled banks bitmap in machine check poller Andi Kleen
2009-02-12 12:49 ` [PATCH] [6/9] x86: CMCI: Define MSR names and fields for new CMCI registers Andi Kleen
2009-02-12 12:49 ` [PATCH] [7/9] x86: CMCI: Add CMCI support Andi Kleen
2009-02-12 12:49 ` [PATCH] [8/9] x86: CMCI: Disable CMCI on rebooting Andi Kleen
2009-02-12 12:49 ` [PATCH] [9/9] x86: CMCI: Recheck CMCI banks after APIC has been enabled on CPU #0 Andi Kleen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20090212149.227733077@firstfloor.org \
    --to=andi@firstfloor.org \
    --cc=akpm@linux-foundation.org \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@elte.hu \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox