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From: Ingo Molnar <mingo@elte.hu>
To: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Mark Langsdorf <mark.langsdorf@amd.com>,
	"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] [PATCH] x86: cacheinfo: fix build error in cache_disable
Date: Fri, 3 Apr 2009 17:59:20 +0200	[thread overview]
Message-ID: <20090403155920.GA18237@elte.hu> (raw)
In-Reply-To: <20090403160721.GC6466@alberich.amd.com>


* Andreas Herrmann <andreas.herrmann3@amd.com> wrote:

> Impact: fix build error
> 
> Commit 45ca863 (x86, cpu: conform L3 Cache Index Disable to Linux standard)
> introduced following build error with CONFIG_K8_NB=n
>   ...
>   arch/x86/mm/built-in.o:(.bss+0x5c0): multiple definition of `k8_northbridges'
>   arch/x86/kernel/built-in.o:(.bss+0x18c8): first defined here
>   ...
> 
> The patch deactivates cache_disable functionality for kernels with
> CONFIG_K8_NB=n.
> 
> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
> ---
>  arch/x86/include/asm/k8.h             |    4 ----
>  arch/x86/kernel/cpu/intel_cacheinfo.c |   19 ++++++++++++++++---
>  2 files changed, 16 insertions(+), 7 deletions(-)
> 
> The real fix would be to enable cache index disable functionality also
> for kernels with CONFIG_K8_NB=n but I don't have time to provide such
> a patch today.
> 
> Ingo, please either apply this (compile tested) patch or revert Mark's
> patch to avoid further blocking of tip/x86/cpu branch.
> 
> 
> Thanks,
> 
> Andreas
> 
> 
> diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h
> index 0d619c3..54c8cc5 100644
> --- a/arch/x86/include/asm/k8.h
> +++ b/arch/x86/include/asm/k8.h
> @@ -6,11 +6,7 @@
>  extern struct pci_device_id k8_nb_ids[];
>  
>  extern int early_is_k8_nb(u32 value);
> -#ifdef CONFIG_K8_NB
>  extern struct pci_dev **k8_northbridges;
> -#else
> -struct pci_dev **k8_northbridges;
> -#endif

hm, what's wrong with the node_to_k8_dev() suggestion i made?

That would be a pretty clean interface, private to k8.c - and it 
would map a 'return NULL' inline function in the !CONFIG_K8_NB case.

	Ingo

  reply	other threads:[~2009-04-03 16:16 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-04-02 10:07 [PATCH] x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions Andreas Herrmann
2009-04-02 10:30 ` Ingo Molnar
2009-04-03 10:58   ` Andreas Herrmann
2009-04-03 16:07   ` [PATCH] [PATCH] x86: cacheinfo: fix build error in cache_disable Andreas Herrmann
2009-04-03 15:59     ` Ingo Molnar [this message]
2009-04-09 13:47   ` [PATCH v2] x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions Andreas Herrmann
2009-04-10 14:06     ` [tip:x86/cpu] " Andreas Herrmann

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