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* [PATCH] x86: fixup numa_node information for AMD CPU northbridge functions
@ 2009-04-17 10:07 Andreas Herrmann
  2009-04-17 16:14 ` Ingo Molnar
  2009-04-17 16:27 ` [tip:x86/cpu] " tip-bot for Andreas Herrmann
  0 siblings, 2 replies; 4+ messages in thread
From: Andreas Herrmann @ 2009-04-17 10:07 UTC (permalink / raw)
  To: Ingo Molnar, H. Peter Anvin; +Cc: jbarnes, linux-kernel

Currently the numa_node attribute for these PCI devices is 0 (it
corresponds to the numa_node for PCI bus 0). This is not a big issue
but incorrect.

This inconsistency can be fixed by reading the node number from CPU
NB function 0.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/kernel/quirks.c |   35 +++++++++++++++++++++++++++++++++++
 1 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e95022e..4dd4e70 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -493,5 +493,40 @@ void force_hpet_resume(void)
 		break;
 	}
 }
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
+/* Set correct numa_node information for AMD NB functions */
+static void __init quirk_amd_nb_node(struct pci_dev *dev)
+{
+	u32 val;
+	struct pci_dev *nb_ht;
+	unsigned int devfn;
 
+	devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
+	nb_ht = pci_get_slot(dev->bus, devfn);
+	if (!nb_ht)
+		return;
+	pci_read_config_dword(nb_ht, 0x60, &val);
+	set_dev_node(&dev->dev, val & 7);
+	pci_dev_put(dev);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
+			quirk_amd_nb_node);
 #endif
-- 
1.6.2




^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] x86: fixup numa_node information for AMD CPU northbridge functions
  2009-04-17 10:07 [PATCH] x86: fixup numa_node information for AMD CPU northbridge functions Andreas Herrmann
@ 2009-04-17 16:14 ` Ingo Molnar
  2009-04-17 16:27 ` [tip:x86/cpu] " tip-bot for Andreas Herrmann
  1 sibling, 0 replies; 4+ messages in thread
From: Ingo Molnar @ 2009-04-17 16:14 UTC (permalink / raw)
  To: Andreas Herrmann; +Cc: H. Peter Anvin, jbarnes, linux-kernel


* Andreas Herrmann <andreas.herrmann3@amd.com> wrote:

> Currently the numa_node attribute for these PCI devices is 0 (it
> corresponds to the numa_node for PCI bus 0). This is not a big issue
> but incorrect.
> 
> This inconsistency can be fixed by reading the node number from CPU
> NB function 0.
> 
> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
> ---
>  arch/x86/kernel/quirks.c |   35 +++++++++++++++++++++++++++++++++++
>  1 files changed, 35 insertions(+), 0 deletions(-)

applied, thanks. Note, i added this impact line to the commit:

 [ Impact: fill in dev->numa_node information, to optimize DMA allocations ]

as numa_node does matter to certain DMA allocations such as 
dma_generic_alloc_coherent() - we (try to) allocate node-local 
memory in that case.

pci_dev::numa_node might be used for more such optimizations in the 
future - so it's generally good to have this filled in correctly.

So it's more than just a fix for an inconsistency.

	Ingo

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [tip:x86/cpu] x86: fixup numa_node information for AMD CPU northbridge functions
  2009-04-17 10:07 [PATCH] x86: fixup numa_node information for AMD CPU northbridge functions Andreas Herrmann
  2009-04-17 16:14 ` Ingo Molnar
@ 2009-04-17 16:27 ` tip-bot for Andreas Herrmann
  2009-04-17 19:22   ` Yinghai Lu
  1 sibling, 1 reply; 4+ messages in thread
From: tip-bot for Andreas Herrmann @ 2009-04-17 16:27 UTC (permalink / raw)
  To: linux-tip-commits
  Cc: linux-kernel, hpa, mingo, andreas.herrmann3, tglx, mingo

Commit-ID:  9b94b3a19b13e094c10f65f24bc358f6ffe4eacd
Gitweb:     http://git.kernel.org/tip/9b94b3a19b13e094c10f65f24bc358f6ffe4eacd
Author:     Andreas Herrmann <andreas.herrmann3@amd.com>
AuthorDate: Fri, 17 Apr 2009 12:07:46 +0200
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 17 Apr 2009 18:12:36 +0200

x86: fixup numa_node information for AMD CPU northbridge functions

Currently the numa_node attribute for these PCI devices is 0 (it
corresponds to the numa_node for PCI bus 0). This is not a big issue
but incorrect.

This inconsistency can be fixed by reading the node number from CPU
NB function 0.

[ Impact: fill in dev->numa_node information, to optimize DMA allocations ]

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: jbarnes@virtuousgeek.org
LKML-Reference: <20090417100746.GG16198@alberich.amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>


---
 arch/x86/kernel/quirks.c |   37 +++++++++++++++++++++++++++++++++++++
 1 files changed, 37 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index e95022e..94ad0c0 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -493,5 +493,42 @@ void force_hpet_resume(void)
 		break;
 	}
 }
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
+/* Set correct numa_node information for AMD NB functions */
+static void __init quirk_amd_nb_node(struct pci_dev *dev)
+{
+	struct pci_dev *nb_ht;
+	unsigned int devfn;
+	u32 val;
+
+	devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
+	nb_ht = pci_get_slot(dev->bus, devfn);
+	if (!nb_ht)
+		return;
+
+	pci_read_config_dword(nb_ht, 0x60, &val);
+	set_dev_node(&dev->dev, val & 7);
+	pci_dev_put(dev);
+}
 
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
+			quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
+			quirk_amd_nb_node);
 #endif

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [tip:x86/cpu] x86: fixup numa_node information for AMD CPU  northbridge functions
  2009-04-17 16:27 ` [tip:x86/cpu] " tip-bot for Andreas Herrmann
@ 2009-04-17 19:22   ` Yinghai Lu
  0 siblings, 0 replies; 4+ messages in thread
From: Yinghai Lu @ 2009-04-17 19:22 UTC (permalink / raw)
  To: mingo, hpa, linux-kernel, andreas.herrmann3, tglx, mingo
  Cc: linux-tip-commits

On Fri, Apr 17, 2009 at 9:27 AM, tip-bot for Andreas Herrmann
<andreas.herrmann3@amd.com> wrote:
> Commit-ID:  9b94b3a19b13e094c10f65f24bc358f6ffe4eacd
> Gitweb:     http://git.kernel.org/tip/9b94b3a19b13e094c10f65f24bc358f6ffe4eacd
> Author:     Andreas Herrmann <andreas.herrmann3@amd.com>
> AuthorDate: Fri, 17 Apr 2009 12:07:46 +0200
> Committer:  Ingo Molnar <mingo@elte.hu>
> CommitDate: Fri, 17 Apr 2009 18:12:36 +0200
>
> x86: fixup numa_node information for AMD CPU northbridge functions
>
> Currently the numa_node attribute for these PCI devices is 0 (it
> corresponds to the numa_node for PCI bus 0). This is not a big issue
> but incorrect.
>
> This inconsistency can be fixed by reading the node number from CPU
> NB function 0.
>
> [ Impact: fill in dev->numa_node information, to optimize DMA allocations ]
>
> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
> Cc: jbarnes@virtuousgeek.org
> LKML-Reference: <20090417100746.GG16198@alberich.amd.com>
> Signed-off-by: Ingo Molnar <mingo@elte.hu>
>
>
> ---
>  arch/x86/kernel/quirks.c |   37 +++++++++++++++++++++++++++++++++++++
>  1 files changed, 37 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
> index e95022e..94ad0c0 100644
> --- a/arch/x86/kernel/quirks.c
> +++ b/arch/x86/kernel/quirks.c
> @@ -493,5 +493,42 @@ void force_hpet_resume(void)
>                break;
>        }
>  }
> +#endif
> +
> +#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
> +/* Set correct numa_node information for AMD NB functions */
> +static void __init quirk_amd_nb_node(struct pci_dev *dev)
> +{
> +       struct pci_dev *nb_ht;
> +       unsigned int devfn;
> +       u32 val;
> +
> +       devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
> +       nb_ht = pci_get_slot(dev->bus, devfn);
> +       if (!nb_ht)
> +               return;
> +
> +       pci_read_config_dword(nb_ht, 0x60, &val);
> +       set_dev_node(&dev->dev, val & 7);
> +       pci_dev_put(dev);
> +}
>
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
> +                       quirk_amd_nb_node);
> +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
> +                       quirk_amd_nb_node);
>  #endif
> --

wonder if need to check if the node is online aka there is memory on
that node...

looks like if that node is not online, should use -1 instead for 64bit.

YH

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2009-04-17 19:22 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2009-04-17 10:07 [PATCH] x86: fixup numa_node information for AMD CPU northbridge functions Andreas Herrmann
2009-04-17 16:14 ` Ingo Molnar
2009-04-17 16:27 ` [tip:x86/cpu] " tip-bot for Andreas Herrmann
2009-04-17 19:22   ` Yinghai Lu

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