From: Ingo Molnar <mingo@elte.hu>
To: Borislav Petkov <borislav.petkov@amd.com>
Cc: akpm@linux-foundation.org, greg@kroah.com, tglx@linutronix.de,
hpa@zytor.com, dougthompson@xmission.com,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 13/21] amd64_edac: add f10-and-later methods-p3
Date: Wed, 29 Apr 2009 20:22:55 +0200 [thread overview]
Message-ID: <20090429182255.GD8321@elte.hu> (raw)
In-Reply-To: <1241024107-14535-14-git-send-email-borislav.petkov@amd.com>
* Borislav Petkov <borislav.petkov@amd.com> wrote:
> From: Doug Thompson <dougthompson@xmission.com>
>
> Signed-off-by: Doug Thompson <dougthompson@xmission.com>
> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
> ---
> drivers/edac/amd64_edac.c | 318 +++++++++++++++++++++++++++++++++++++++++++++
> 1 files changed, 318 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index fe2342c..84075c0 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -2726,4 +2726,322 @@ static int f10_lookup_addr_in_dct(u32 InputAddr, u32 NodeID, u32 ChannelSelect)
> return CSFound;
> }
>
> +/*
> + * f10_match_to_this_node
> + *
> + * For a given 'DramRange' value, check if 'SystemAddr' fall within this value
> + */
> +static int f10_match_to_this_node(struct amd64_pvt *pvt, int DramRange,
> + u64 SystemAddr,
> + int *node_id,
> + int *channel_select)
> +{
> + int CSFound = -1;
> + int NodeID;
> + int HiRangeSelected;
> + u32 IntlvEn, IntlvSel;
> + u32 DramEn;
> + u32 Ilog;
> + u32 HoleOffset, HoleEn;
> + u32 InputAddr, Temp;
> + u32 DctSelBaseAddr, DctSelIntLvAddr;
> + u32 DctSelHi;
> + u32 ChannelSelect;
> + u64 DramBaseLong, DramLimitLong;
> + u64 DctSelBaseOffsetLong, ChannelAddrLong;
> +
> + /* DRAM Base value for this DRAM instance */
> + DramBaseLong = pvt->dram_base[DramRange];
> + DramEn = pvt->dram_rw_en[DramRange];
> + IntlvEn = pvt->dram_IntlvEn[DramRange];
> +
> + /* DRAM Limit value for this DRAM instance */
> + DramLimitLong = pvt->dram_limit[DramRange];
> + NodeID = pvt->dram_DstNode[DramRange];
> + IntlvSel = pvt->dram_IntlvSel[DramRange];
> +
> + debugf1("%s(dram=%d) Base=0x%llx SystemAddr= 0x%llx Limit=0x%llx\n",
> + __func__, DramRange, DramBaseLong, SystemAddr, DramLimitLong);
> +
> + /* This assumes that one node's DHAR is the same as
> + * all the other node's DHARs
> + */
> + HoleEn = pvt->dhar;
> + HoleOffset = (HoleEn & 0x0000FF80);
> + HoleEn = (HoleEn & 0x00000003);
> +
> + debugf1(" HoleOffset=0x%x HoleEn=0x%x IntlvSel=0x%x\n",
> + HoleOffset, HoleEn, IntlvSel);
> +
> + if ((IntlvEn == 0) || IntlvSel == ((SystemAddr >> 12) & IntlvEn)) {
> +
> + Ilog = f10_map_IntlvEn_to_shift(IntlvEn);
> +
> + Temp = pvt->dram_ctl_select_low;
> + DctSelBaseOffsetLong = pvt->dram_ctl_select_high << 16;
> +
> + DctSelHi = (Temp >> 1) & 1;
> + DctSelIntLvAddr = dct_sel_interleave_addr(pvt);
> + DctSelBaseAddr = dct_sel_baseaddr(pvt);
> +
> + if (dct_high_range_enabled(pvt) &&
> + !dct_ganging_enabled(pvt) &&
> + ((SystemAddr >> 27) >= (DctSelBaseAddr >> 11)))
> + HiRangeSelected = 1;
> + else
> + HiRangeSelected = 0;
> +
> + ChannelSelect = f10_determine_channel(pvt, SystemAddr,
> + HiRangeSelected, IntlvEn);
> +
> + ChannelAddrLong = f10_determine_base_addr_offset(
> + SystemAddr,
> + HiRangeSelected,
> + DctSelBaseAddr,
> + DctSelBaseOffsetLong,
> + HoleEn,
> + HoleOffset,
> + DramBaseLong);
> +
> + /* Remove Node ID (in case of processor interleaving) */
> + Temp = ChannelAddrLong & 0xFC0;
> +
> + ChannelAddrLong = ((ChannelAddrLong >> Ilog) &
> + 0xFFFFFFFFF000ULL) | Temp;
> +
> + /* Remove Channel interleave and hash */
> + if (dct_interleave_enabled(pvt) &&
> + !dct_high_range_enabled(pvt) &&
> + !dct_ganging_enabled(pvt)) {
> + if (DctSelIntLvAddr != 1)
> + ChannelAddrLong =
> + (ChannelAddrLong >> 1) &
> + 0xFFFFFFFFFFFFFFC0ULL;
> + else {
> + Temp = ChannelAddrLong & 0xFC0;
> + ChannelAddrLong =
> + ((ChannelAddrLong &
> + 0xFFFFFFFFFFFFC000ULL)
> + >> 1) | Temp;
> + }
> + }
> +
> + /* Form a normalize InputAddr (Move bits 36:8 down to 28:0
> + * which will set it up to match the DCT Base register
> + */
> + InputAddr = ChannelAddrLong >> 8;
> +
> + debugf1(" (ChannelAddrLong=0x%llx) >> 8 becomes "
> + "InputAddr=0x%x\n", ChannelAddrLong, InputAddr);
> +
> + /* Iterate over the DRAM DCTs looking for a
> + * match for InputAddr on the selected NodeID
> + */
> + CSFound = f10_lookup_addr_in_dct(InputAddr,
> + NodeID, ChannelSelect);
> +
> + if (CSFound >= 0) {
> + *node_id = NodeID;
> + *channel_select = ChannelSelect;
> + }
> + }
> +
> + return CSFound;
> +}
this function is probably too large, and also it uses some weird
hungarian notation coding style. Please dont do that! It's
completely unacceptable.
this condition:
> + if ((IntlvEn == 0) || IntlvSel == ((SystemAddr >> 12) & IntlvEn)) {
could be inverted and an early "return cs_found" could be done -
saving an indentitation level for most of the above code.
etc. etc.
Please look at the function in a really large xterm, from far away.
If the shape does not look 'good', and the structure is not an
obvious pattern seen a hundred times elsewhere in the kernel,
there's something weird going on with the function. It should be
split up, cleaned up, simplified. Variable names could become
shorter, etc. etc.
Ingo
next prev parent reply other threads:[~2009-04-29 18:23 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-29 16:54 [RFC PATCH 00/21 v2] amd64_edac: EDAC module for AMD64 Borislav Petkov
2009-04-29 16:54 ` [PATCH 01/21] x86: add methods for writing of an MSR on several CPUs Borislav Petkov
2009-04-29 17:39 ` H. Peter Anvin
2009-05-04 16:46 ` Borislav Petkov
2009-05-04 17:25 ` H. Peter Anvin
2009-05-04 17:53 ` Borislav Petkov
2009-05-04 20:51 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 02/21] amd64_edac: add PCI config register defines Borislav Petkov
2009-05-04 20:54 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 03/21] amd64_edac: add driver structs Borislav Petkov
2009-05-04 20:38 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 04/21] amd64_edac: add memory scrubber interface Borislav Petkov
2009-05-04 21:02 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 05/21] amd64_edac: add sys addr to memory controller mapping helpers Borislav Petkov
2009-05-04 21:08 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 06/21] amd64_edac: add functionality to compute the DRAM hole Borislav Petkov
2009-05-04 21:22 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 07/21] amd64_edac: add DRAM address type conversion facilities Borislav Petkov
2009-05-04 21:39 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 08/21] amd64_edac: add helper to dump relevant registers Borislav Petkov
2009-05-04 21:43 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 09/21] amd64_edac: assign DRAM chip select base and mask in a family-specific way Borislav Petkov
2009-05-04 21:59 ` Mauro Carvalho Chehab
2009-05-05 10:25 ` Borislav Petkov
2009-04-29 16:54 ` [PATCH 10/21] amd64_edac: add k8-specific methods Borislav Petkov
2009-05-04 22:06 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 11/21] amd64_edac: add f10-and-later methods-p1 Borislav Petkov
2009-05-04 22:10 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 12/21] amd64_edac: add f10-and-later methods-p2 Borislav Petkov
2009-05-04 23:25 ` Mauro Carvalho Chehab
2009-04-29 16:54 ` [PATCH 13/21] amd64_edac: add f10-and-later methods-p3 Borislav Petkov
2009-04-29 18:22 ` Ingo Molnar [this message]
2009-04-29 18:24 ` Ingo Molnar
2009-04-29 19:05 ` Andrew Morton
2009-04-29 19:23 ` Ingo Molnar
2009-04-29 19:42 ` Andrew Morton
2009-04-29 19:53 ` Ingo Molnar
2009-04-29 20:47 ` Ingo Molnar
2009-04-30 10:01 ` Borislav Petkov
2009-04-30 10:42 ` Ingo Molnar
2009-05-04 23:36 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 14/21] amd64_edac: add per-family descriptors Borislav Petkov
2009-05-04 23:39 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 15/21] amd64_edac: add ECC chipkill syndrome mapping table Borislav Petkov
2009-05-04 23:42 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 16/21] amd64_edac: add error decoding logic Borislav Petkov
2009-04-29 18:19 ` Ingo Molnar
2009-05-04 23:48 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 17/21] amd64_edac: add EDAC core-related initializers Borislav Petkov
2009-05-04 23:53 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 18/21] amd64_edac: add ECC reporting initializers Borislav Petkov
2009-05-04 23:59 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 19/21] amd64_edac: add debugging/testing code Borislav Petkov
2009-04-29 18:18 ` Ingo Molnar
2009-04-29 16:55 ` [PATCH 20/21] amd64_edac: add DRAM error injection logic using sysfs Borislav Petkov
2009-04-29 18:17 ` Ingo Molnar
2009-05-05 0:06 ` Mauro Carvalho Chehab
2009-04-29 16:55 ` [PATCH 21/21] amd64_edac: add module registration routines Borislav Petkov
2009-05-05 0:10 ` Mauro Carvalho Chehab
2009-04-29 19:30 ` [RFC PATCH 00/21 v2] amd64_edac: EDAC module for AMD64 Andi Kleen
2009-04-30 11:57 ` Borislav Petkov
2009-04-30 12:21 ` Ingo Molnar
2009-04-30 12:47 ` Andi Kleen
2009-04-30 14:48 ` Aristeu Rozanski
2009-05-01 7:53 ` Borislav Petkov
2009-05-03 0:32 ` Aristeu Rozanski
2009-04-30 18:37 ` Mauro Carvalho Chehab
2009-05-01 12:39 ` Ingo Molnar
-- strict thread matches above, loose matches on Subject: below --
2009-04-30 6:21 [PATCH 13/21] amd64_edac: add f10-and-later methods-p3 Doug Thompson
2009-05-05 19:30 Doug Thompson
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