[PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Gadiyar, Anand]

From: Anand Gadiyar <gadiyar@ti.com>

OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

This considerably reduces the number of interrupts during a transfer
and ought to result in some power saving.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
---
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index e62a22a..2d83807 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -70,6 +70,8 @@
 #define DTO_MASK		0x000F0000
 #define DTO_SHIFT		16
 #define INT_EN_MASK		0x307F0033
+#define BWR_ENABLE		(1 << 4)
+#define BRR_ENABLE		(1 << 5)
 #define INIT_STREAM		(1 << 1)
 #define DP_SELECT		(1 << 21)
 #define DDIR			(1 << 4)
@@ -241,7 +243,12 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
 	 */
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
 	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
-	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
+
+	if (host->use_dma)
+		OMAP_HSMMC_WRITE(host->base, IE,
+				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));
+	else
+		OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
 
 	host->response_busy = 0;
 	if (cmd->flags & MMC_RSP_PRESENT) {

Re: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Pierre Ossman]

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Jarkko? Tony?

On Tue, 21 Apr 2009 13:09:22 +0530
"Gadiyar, Anand" <gadiyar@ti.com> wrote:

> From: Anand Gadiyar <gadiyar@ti.com>
> 
> OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> 
> This considerably reduces the number of interrupts during a transfer
> and ought to result in some power saving.
> 
> Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
> ---
> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index e62a22a..2d83807 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -70,6 +70,8 @@
>  #define DTO_MASK		0x000F0000
>  #define DTO_SHIFT		16
>  #define INT_EN_MASK		0x307F0033
> +#define BWR_ENABLE		(1 << 4)
> +#define BRR_ENABLE		(1 << 5)
>  #define INIT_STREAM		(1 << 1)
>  #define DP_SELECT		(1 << 21)
>  #define DDIR			(1 << 4)
> @@ -241,7 +243,12 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
>  	 */
>  	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
>  	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
> -	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
> +
> +	if (host->use_dma)
> +		OMAP_HSMMC_WRITE(host->base, IE,
> +				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));
> +	else
> +		OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
>  
>  	host->response_busy = 0;
>  	if (cmd->flags & MMC_RSP_PRESENT) {


-- 
     -- Pierre Ossman

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Re: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Tony Lindgren]

* Pierre Ossman <pierre@ossman.eu> [090428 12:38]:
> Jarkko? Tony?

Hmm, we haven't heard from Jarkko for a while.. Adrian, care to take
a look at this patch?

Tony
 
> On Tue, 21 Apr 2009 13:09:22 +0530
> "Gadiyar, Anand" <gadiyar@ti.com> wrote:
> 
> > From: Anand Gadiyar <gadiyar@ti.com>
> > 
> > OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> > 
> > This considerably reduces the number of interrupts during a transfer
> > and ought to result in some power saving.
> > 
> > Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
> > Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> > Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
> > ---
> > diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> > index e62a22a..2d83807 100644
> > --- a/drivers/mmc/host/omap_hsmmc.c
> > +++ b/drivers/mmc/host/omap_hsmmc.c
> > @@ -70,6 +70,8 @@
> >  #define DTO_MASK		0x000F0000
> >  #define DTO_SHIFT		16
> >  #define INT_EN_MASK		0x307F0033
> > +#define BWR_ENABLE		(1 << 4)
> > +#define BRR_ENABLE		(1 << 5)
> >  #define INIT_STREAM		(1 << 1)
> >  #define DP_SELECT		(1 << 21)
> >  #define DDIR			(1 << 4)
> > @@ -241,7 +243,12 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd,
> >  	 */
> >  	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
> >  	OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK);
> > -	OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
> > +
> > +	if (host->use_dma)
> > +		OMAP_HSMMC_WRITE(host->base, IE,
> > +				 INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE));
> > +	else
> > +		OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK);
> >  
> >  	host->response_busy = 0;
> >  	if (cmd->flags & MMC_RSP_PRESENT) {
> 
> 
> -- 
>      -- Pierre Ossman
> 
>   WARNING: This correspondence is being monitored by the
>   Swedish government. Make sure your server uses encryption
>   for SMTP traffic and consider using PGP for end-to-end
>   encryption.

Re: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Jarkko Lavinen]

On Tue, Apr 21, 2009 at 09:39:22AM +0200, ext Gadiyar, Anand wrote:
> From: Anand Gadiyar <gadiyar@ti.com>
> 
> OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> 
> This considerably reduces the number of interrupts during a transfer
> and ought to result in some power saving.

I tried the patch with reading from the raw mmc block device to
/dev/null with dd (with bs 32k and 1M).  I cannot see any
difference in interrupt count from /proc/interrupts or in read
speed. At least the patch works. Cpu was 34340es3.

I also trid without the patch just disabling the Buffer
Read/write Ready bits from INT_EN_MASK which is then written to
both MMCHS_IE and MMCHS_ISE.  Still no change in read speed nor
mmc irq count.

Cheers
Jarkko Lavinen

RE: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Gadiyar, Anand]

On Tue, May 5, 2009, Jarkko Lavinen wrote: 
> On Tue, Apr 21, 2009 at 09:39:22AM +0200, ext Gadiyar, Anand wrote:
> > From: Anand Gadiyar <gadiyar@ti.com>
> > 
> > OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> > 
> > This considerably reduces the number of interrupts during a transfer
> > and ought to result in some power saving.
> 
> I tried the patch with reading from the raw mmc block device to
> /dev/null with dd (with bs 32k and 1M).  I cannot see any
> difference in interrupt count from /proc/interrupts or in read
> speed. At least the patch works. Cpu was 34340es3.
> 
> I also trid without the patch just disabling the Buffer
> Read/write Ready bits from INT_EN_MASK which is then written to
> both MMCHS_IE and MMCHS_ISE.  Still no change in read speed nor
> mmc irq count.
> 
> Cheers
> Jarkko Lavinen

I discovered this while doing MMC writes. I did not check if there
was any difference during a read. I notice you have only tested with
MMC reads.

Here's what I get with and without the patch.

- Anand

Without patch
/ # mount -t vfat /dev/mmcblk0 /mnt/mmc
/ # cat /proc/interrupts | grep mmc
 83:         90        INTC  mmc0
384:          1     twl4030  mmc0
/ # dd if=/dev/zero of=/mnt/mmc/32kbs.txt bs=32k count=1000
1000+0 records in
1000+0 records out
/ # cat /proc/interrupts | grep mmc
 83:       3760        INTC  mmc0
384:          1     twl4030  mmc0
/ # dd if=/dev/zero of=/mnt/mmc/1Mbs.txt bs=1M count=32
32+0 records in
32+0 records out
/ # cat /proc/interrupts | grep mmc
 83:       7570        INTC  mmc0
384:          1     twl4030  mmc0
/ # ls -l /mnt/mmc
-rwxr-xr-x    1 root     root     33554432 Dec 31 18:03 1Mbs.txt
-rwxr-xr-x    1 root     root     32768000 Dec 31 18:03 32kbs.txt
/ # umount /mnt/mmc


With patch
/ # mount -t vfat /dev/mmcblk0 /mnt/mmc
/ # cat /proc/interrupts | grep mmc
 83:         67        INTC  mmc0
384:          0     twl4030  mmc0
/ # dd if=/dev/zero of=/mnt/mmc/32kbs.txt bs=32k count=1000
1000+0 records in
1000+0 records out
/ # cat /proc/interrupts | grep mmc
 83:       3103        INTC  mmc0
384:          0     twl4030  mmc0
/ # dd if=/dev/zero of=/mnt/mmc/1Mbs.txt bs=1M count=32
32+0 records in
32+0 records out
/ # cat /proc/interrupts | grep mmc
 83:       6170        INTC  mmc0
384:          0     twl4030  mmc0
/ # ls -l /mnt/mmc
-rwxr-xr-x    1 root     root     33554432 Dec 31 18:01 1Mbs.txt
-rwxr-xr-x    1 root     root     32768000 Dec 31 18:00 32kbs.txt
/ # umount /mnt/mmc

RE: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Gadiyar, Anand]

On Wed, May 06, 2009, Gadiyar, Anand wrote:
> On Tue, May 5, 2009, Jarkko Lavinen wrote: 
> > On Tue, Apr 21, 2009 at 09:39:22AM +0200, ext Gadiyar, Anand wrote:
> > > From: Anand Gadiyar <gadiyar@ti.com>
> > > 
> > > OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> > > 
> > > This considerably reduces the number of interrupts during a transfer
> > > and ought to result in some power saving.
> > 
> > I tried the patch with reading from the raw mmc block device to
> > /dev/null with dd (with bs 32k and 1M).  I cannot see any
> > difference in interrupt count from /proc/interrupts or in read
> > speed. At least the patch works. Cpu was 34340es3.
> > 
> > I also trid without the patch just disabling the Buffer
> > Read/write Ready bits from INT_EN_MASK which is then written to
> > both MMCHS_IE and MMCHS_ISE.  Still no change in read speed nor
> > mmc irq count.
> > 
> > Cheers
> > Jarkko Lavinen
> 
> I discovered this while doing MMC writes. I did not check if there
> was any difference during a read. I notice you have only tested with
> MMC reads.
> 
> Here's what I get with and without the patch.
> 
> - Anand


Any comments on this? Is it safe to merge?

Thanks,
Anand



> 
> Without patch
> / # mount -t vfat /dev/mmcblk0 /mnt/mmc
> / # cat /proc/interrupts | grep mmc
>  83:         90        INTC  mmc0
> 384:          1     twl4030  mmc0
> / # dd if=/dev/zero of=/mnt/mmc/32kbs.txt bs=32k count=1000
> 1000+0 records in
> 1000+0 records out
> / # cat /proc/interrupts | grep mmc
>  83:       3760        INTC  mmc0
> 384:          1     twl4030  mmc0
> / # dd if=/dev/zero of=/mnt/mmc/1Mbs.txt bs=1M count=32
> 32+0 records in
> 32+0 records out
> / # cat /proc/interrupts | grep mmc
>  83:       7570        INTC  mmc0
> 384:          1     twl4030  mmc0
> / # ls -l /mnt/mmc
> -rwxr-xr-x    1 root     root     33554432 Dec 31 18:03 1Mbs.txt
> -rwxr-xr-x    1 root     root     32768000 Dec 31 18:03 32kbs.txt
> / # umount /mnt/mmc
> 
> 
> With patch
> / # mount -t vfat /dev/mmcblk0 /mnt/mmc
> / # cat /proc/interrupts | grep mmc
>  83:         67        INTC  mmc0
> 384:          0     twl4030  mmc0
> / # dd if=/dev/zero of=/mnt/mmc/32kbs.txt bs=32k count=1000
> 1000+0 records in
> 1000+0 records out
> / # cat /proc/interrupts | grep mmc
>  83:       3103        INTC  mmc0
> 384:          0     twl4030  mmc0
> / # dd if=/dev/zero of=/mnt/mmc/1Mbs.txt bs=1M count=32
> 32+0 records in
> 32+0 records out
> / # cat /proc/interrupts | grep mmc
>  83:       6170        INTC  mmc0
> 384:          0     twl4030  mmc0
> / # ls -l /mnt/mmc
> -rwxr-xr-x    1 root     root     33554432 Dec 31 18:01 1Mbs.txt
> -rwxr-xr-x    1 root     root     32768000 Dec 31 18:00 32kbs.txt
> / # umount /mnt/mmc 

RE: [PATCH] OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA

[Gadiyar, Anand]

On Fri, May 22, 2009, Gadiyar, Anand wrote:
> On Wed, May 06, 2009, Gadiyar, Anand wrote:
> > On Tue, May 5, 2009, Jarkko Lavinen wrote: 
> > > On Tue, Apr 21, 2009 at 09:39:22AM +0200, ext Gadiyar, Anand wrote:
> > > > From: Anand Gadiyar <gadiyar@ti.com>
> > > > 
> > > > OMAP: HSMMC: Do not enable buffer ready interrupt if using DMA
> > > > 
> > > > This considerably reduces the number of interrupts during a transfer
> > > > and ought to result in some power saving.
> > > 
> > > I tried the patch with reading from the raw mmc block device to
> > > /dev/null with dd (with bs 32k and 1M).  I cannot see any
> > > difference in interrupt count from /proc/interrupts or in read
> > > speed. At least the patch works. Cpu was 34340es3.
> > > 
> > > I also trid without the patch just disabling the Buffer
> > > Read/write Ready bits from INT_EN_MASK which is then written to
> > > both MMCHS_IE and MMCHS_ISE.  Still no change in read speed nor
> > > mmc irq count.
> > > 
> > > Cheers
> > > Jarkko Lavinen
> > 
> > I discovered this while doing MMC writes. I did not check if there
> > was any difference during a read. I notice you have only tested with
> > MMC reads.
> > 
> > Here's what I get with and without the patch.
> > 
> > - Anand
> 
> 
> Any comments on this? Is it safe to merge?
> 
> Thanks,
> Anand

<snip>


Ping?

Patchwork link is:
http://patchwork.kernel.org/patch/19133/