Re: 2.6.30-rc4: microcode: failed to init CPU1

Re: 2.6.30-rc4: microcode: failed to init CPU1

[Dmitry Adamushko]

>> [ ... ]
>> [ 6643.982900] microcode: failed to init CPU1
>> [ 6643.983528] CPU1 is up
>> [ 6643.984529] ACPI: Waking up from system sleep state S4
>> [ 6644.290917] pci 0000:00:1e.0: power state changed by ACPI to D0
>> [ 6644.291103] ata_piix 0000:00:1f.1: power state changed by ACPI to D0
>> [ 6644.291139] ata_piix 0000:00:1f.1: restoring config space at offset 0x1 (was 0x2800001, writing 0x2800005)
>> [ 6644.291187] ata_piix 0000:00:1f.2: restoring config space at offset 0x1 (was 0x2b00003, writing 0x2b00007)
>> [ 6644.297593] pci 0000:00:07.0: PME# disabled
>>
>> Is this an error/problem?
>
> Not sure.
>
> CCing the people who have worked with the Intel microcode code recently.


does the error message disappear with the following patch applied?

Thanks in advance.


---


Subject: error handling inconsistency

Don't report an error in case there is simply no cached microcode update available when resuming.


p.s. the current version in -tip provides better error handling and doesn't have this problem.


Signed-off-by: Dmitry Adamushko <dmitry.adamushko@gmail.com>


diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 98c470c..4fe8c3c 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -307,7 +307,7 @@ static int microcode_resume_cpu(int cpu)
 	pr_debug("microcode: CPU%d resumed\n", cpu);
 
 	if (!uci->mc)
-		return 1;
+		return 0;
 
 	/*
 	 * Let's verify that the 'cached' ucode does belong

Re: 2.6.30-rc4: microcode: failed to init CPU1

[Ingo Molnar]

* Dmitry Adamushko <dmitry.adamushko@gmail.com> wrote:

> 
> >> [ ... ]
> >> [ 6643.982900] microcode: failed to init CPU1
> >> [ 6643.983528] CPU1 is up
> >> [ 6643.984529] ACPI: Waking up from system sleep state S4
> >> [ 6644.290917] pci 0000:00:1e.0: power state changed by ACPI to D0
> >> [ 6644.291103] ata_piix 0000:00:1f.1: power state changed by ACPI to D0
> >> [ 6644.291139] ata_piix 0000:00:1f.1: restoring config space at offset 0x1 (was 0x2800001, writing 0x2800005)
> >> [ 6644.291187] ata_piix 0000:00:1f.2: restoring config space at offset 0x1 (was 0x2b00003, writing 0x2b00007)
> >> [ 6644.297593] pci 0000:00:07.0: PME# disabled
> >>
> >> Is this an error/problem?
> >
> > Not sure.
> >
> > CCing the people who have worked with the Intel microcode code recently.
> 
> 
> does the error message disappear with the following patch applied?
> 
> Thanks in advance.
> 
> 
> ---
> 
> 
> Subject: error handling inconsistency
> 
> Don't report an error in case there is simply no cached microcode 
> update available when resuming.
> 
> p.s. the current version in -tip provides better error handling 
> and doesn't have this problem.
> 
> Signed-off-by: Dmitry Adamushko <dmitry.adamushko@gmail.com>

We can do your fixlet for .30 as well (if it's tested by Thomas to 
solve the problem) - the reworked code in -tip is invasive changes 
aimed at .31.

	Ingo

2.6.30-rc4: microcode: failed to init CPU1

[Thomas Meyer]

Hi,

With 2.6.30-rc4 I see this after resume from ram or disk. Here log from resume from disk:

[ 6643.757890] Breaking affinity for irq 23
[ 6643.759029] kvm: disabling virtualization on CPU1
[ 6643.859360] CPU 1 is now offline
[ 6643.859366] SMP alternatives: switching to UP code
[ 6643.869609] CPU1 is down
[ 6643.869682] Extended CMOS year: 2000
[ 6643.869786] PM: Creating hibernation image: 
[ 6643.872676] PM: Need to copy 124075 pages
[ 6643.872676] Intel machine check architecture supported.
[ 6643.872676] Intel machine check reporting enabled on CPU#0.
[ 6643.872676] PM: Restoring platform NVS memory
[ 6643.872676] Extended CMOS year: 2000
[ 6643.872676] Enabling non-boot CPUs ...
[ 6643.872676] SMP alternatives: switching to SMP code
[ 6643.879652] CPU 1 irqstacks, hard=c20d6000 soft=c20d7000
[ 6643.879661] Booting processor 1 APIC 0x1 ip 0x6000
[ 6643.869076] Initializing CPU#1
[ 6643.869076] Calibrating delay using timer specific routine.. 3663.43 BogoMIPS (lpj=6103090)
[ 6643.869076] CPU: L1 I cache: 32K, L1 D cache: 32K
[ 6643.869076] CPU: L2 cache: 2048K
[ 6643.869076] CPU: Physical Processor ID: 0
[ 6643.869076] CPU: Processor Core ID: 1
[ 6643.869076] Intel machine check architecture supported.
[ 6643.869076] Intel machine check reporting enabled on CPU#1.
[ 6643.973311] CPU1: Genuine Intel(R) CPU           T2400  @ 1.83GHz stepping 08
[ 6643.973364] kvm: enabling virtualization on CPU1
[ 6643.973521] Switched to high resolution mode on CPU 1
[ 6643.982900] microcode: failed to init CPU1
[ 6643.983528] CPU1 is up
[ 6643.984529] ACPI: Waking up from system sleep state S4
[ 6644.290917] pci 0000:00:1e.0: power state changed by ACPI to D0
[ 6644.291103] ata_piix 0000:00:1f.1: power state changed by ACPI to D0
[ 6644.291139] ata_piix 0000:00:1f.1: restoring config space at offset 0x1 (was 0x2800001, writing 0x2800005)
[ 6644.291187] ata_piix 0000:00:1f.2: restoring config space at offset 0x1 (was 0x2b00003, writing 0x2b00007)
[ 6644.297593] pci 0000:00:07.0: PME# disabled

Is this an error/problem?

greets
thomas

Re: 2.6.30-rc4: microcode: failed to init CPU1

[Rafael J. Wysocki]

On Wednesday 06 May 2009, Thomas Meyer wrote:
> Hi,
> 
> With 2.6.30-rc4 I see this after resume from ram or disk. Here log from resume from disk:
> 
> [ 6643.757890] Breaking affinity for irq 23
> [ 6643.759029] kvm: disabling virtualization on CPU1
> [ 6643.859360] CPU 1 is now offline
> [ 6643.859366] SMP alternatives: switching to UP code
> [ 6643.869609] CPU1 is down
> [ 6643.869682] Extended CMOS year: 2000
> [ 6643.869786] PM: Creating hibernation image: 
> [ 6643.872676] PM: Need to copy 124075 pages
> [ 6643.872676] Intel machine check architecture supported.
> [ 6643.872676] Intel machine check reporting enabled on CPU#0.
> [ 6643.872676] PM: Restoring platform NVS memory
> [ 6643.872676] Extended CMOS year: 2000
> [ 6643.872676] Enabling non-boot CPUs ...
> [ 6643.872676] SMP alternatives: switching to SMP code
> [ 6643.879652] CPU 1 irqstacks, hard=c20d6000 soft=c20d7000
> [ 6643.879661] Booting processor 1 APIC 0x1 ip 0x6000
> [ 6643.869076] Initializing CPU#1
> [ 6643.869076] Calibrating delay using timer specific routine.. 3663.43 BogoMIPS (lpj=6103090)
> [ 6643.869076] CPU: L1 I cache: 32K, L1 D cache: 32K
> [ 6643.869076] CPU: L2 cache: 2048K
> [ 6643.869076] CPU: Physical Processor ID: 0
> [ 6643.869076] CPU: Processor Core ID: 1
> [ 6643.869076] Intel machine check architecture supported.
> [ 6643.869076] Intel machine check reporting enabled on CPU#1.
> [ 6643.973311] CPU1: Genuine Intel(R) CPU           T2400  @ 1.83GHz stepping 08
> [ 6643.973364] kvm: enabling virtualization on CPU1
> [ 6643.973521] Switched to high resolution mode on CPU 1
> [ 6643.982900] microcode: failed to init CPU1
> [ 6643.983528] CPU1 is up
> [ 6643.984529] ACPI: Waking up from system sleep state S4
> [ 6644.290917] pci 0000:00:1e.0: power state changed by ACPI to D0
> [ 6644.291103] ata_piix 0000:00:1f.1: power state changed by ACPI to D0
> [ 6644.291139] ata_piix 0000:00:1f.1: restoring config space at offset 0x1 (was 0x2800001, writing 0x2800005)
> [ 6644.291187] ata_piix 0000:00:1f.2: restoring config space at offset 0x1 (was 0x2b00003, writing 0x2b00007)
> [ 6644.297593] pci 0000:00:07.0: PME# disabled
> 
> Is this an error/problem?

Not sure.

CCing the people who have worked with the Intel microcode code recently.

Thanks,
Rafael