From: Ingo Molnar <mingo@elte.hu>
To: Harald Welte <HaraldWelte@viatech.com>
Cc: Jaswinder Singh Rajput <jaswinder@kernel.org>,
linux-kernel@vger.kernel.org, tglx@linutronix.de
Subject: Re: [PATCH] X86: cpu_debug support for VIA / Centaur CPU's
Date: Tue, 9 Jun 2009 17:15:57 +0200 [thread overview]
Message-ID: <20090609151557.GA9362@elte.hu> (raw)
In-Reply-To: <20090609145305.GD3986@prithivi.gnumonks.org>
* Harald Welte <HaraldWelte@viatech.com> wrote:
> Thanks for your quick response.
>
> On Tue, Jun 09, 2009 at 02:23:18PM +0530, Jaswinder Singh Rajput wrote:
>
> > On Tue, 2009-06-09 at 16:29 +0800, Harald Welte wrote:
> > > This patch adds the MSR definitions for the VIA/Centaur CPU models
> > > to cpu_debug.c
> > >
> > > Signed-off-by: Harald Welte <HaraldWelte@viatech.com>
> >
> > As per Ingo suggestion, we removed model information from cpu_debug and
> > is available in -tip :
>
> but what happens if one MSR has a different group from vendor A to
> vendor B? [...]
MSRs should really be enumerated along CPU features. They will be
accessed if a CPU offers that CPU feature.
> [...] and what happens if you read MSR's on a CPU that doesn't
> have them? I suppose you get a segmentation fault, at least
> that's what I've received in the past when accidentially reading a
> MSR that doesn't exist. Is that what the _safe_ variant of rdmsr
> is for?
Yeah, the safe read should never fault - there should be all zeroes
or an error return.
Ingo
next prev parent reply other threads:[~2009-06-09 15:16 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-09 8:29 [PATCH] X86: cpu_debug support for VIA / Centaur CPU's Harald Welte
2009-06-09 8:53 ` Jaswinder Singh Rajput
2009-06-09 14:53 ` Harald Welte
2009-06-09 15:15 ` Ingo Molnar [this message]
2009-06-10 4:23 ` H. Peter Anvin
2009-06-10 11:02 ` Ingo Molnar
2009-06-10 11:11 ` Michael S. Zick
2009-06-10 11:13 ` Ingo Molnar
2009-06-10 11:55 ` Michael S. Zick
2009-06-10 22:30 ` H. Peter Anvin
2009-06-09 15:18 ` Jaswinder Singh Rajput
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