From: Ingo Molnar <mingo@elte.hu>
To: "H. Peter Anvin" <hpa@kernel.org>
Cc: Harald Welte <HaraldWelte@viatech.com>,
Jaswinder Singh Rajput <jaswinder@kernel.org>,
linux-kernel@vger.kernel.org, tglx@linutronix.de
Subject: Re: [PATCH] X86: cpu_debug support for VIA / Centaur CPU's
Date: Wed, 10 Jun 2009 13:02:44 +0200 [thread overview]
Message-ID: <20090610110244.GE27724@elte.hu> (raw)
In-Reply-To: <4A2F353A.9040007@kernel.org>
* H. Peter Anvin <hpa@kernel.org> wrote:
> Ingo Molnar wrote:
> >
> > MSRs should really be enumerated along CPU features. They will be
> > accessed if a CPU offers that CPU feature.
> >
>
> Nice in theory, but so many MSRs have to be enumerated with obscure test
> combinations, that it really isn't practical in the general case. That
> is why we have the safe MSR variants.
>
> >
> > Yeah, the safe read should never fault - there should be all
> > zeroes or an error return.
> >
>
> Error return, MSRs #GP if not present. All zero means a present
> MSR (which is zero.)
yes, of course - i meant the /debug/x86/cpu/* behavior: it should
either result zeroes, or should return -EINVAL. (probably the
latter)
Ingo
next prev parent reply other threads:[~2009-06-10 11:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-09 8:29 [PATCH] X86: cpu_debug support for VIA / Centaur CPU's Harald Welte
2009-06-09 8:53 ` Jaswinder Singh Rajput
2009-06-09 14:53 ` Harald Welte
2009-06-09 15:15 ` Ingo Molnar
2009-06-10 4:23 ` H. Peter Anvin
2009-06-10 11:02 ` Ingo Molnar [this message]
2009-06-10 11:11 ` Michael S. Zick
2009-06-10 11:13 ` Ingo Molnar
2009-06-10 11:55 ` Michael S. Zick
2009-06-10 22:30 ` H. Peter Anvin
2009-06-09 15:18 ` Jaswinder Singh Rajput
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