[PATCH 1/2] x86, msr: Add an AMD wrmsr with exception handling

Borislav Petkov
2009-08-13T12:31:46Z

While at it, convert native_read_msr_amd_safe to using named inline asm
parameters as the rest of the functions.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
arch/x86/include/asm/msr.h | 32 ++++++++++++++++++++++++++++----
1 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 48ad9d2..3ea381b 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -76,14 +76,14 @@ static inline unsigned long long native_read_msr_amd_safe(unsigned int msr,
{
DECLARE_ARGS(val, low, high);

- asm volatile("2: rdmsr ; xor %0,%0\n"
+ asm volatile("2: rdmsr ; xor %[err],%[err]\n"
"1:\n\t"
".section .fixup,\"ax\"\n\t"
- "3: mov %3,%0 ; jmp 1b\n\t"
+ "3: mov %[fault],%[err] ; jmp 1b\n\t"
".previous\n\t"
_ASM_EXTABLE(2b, 3b)
- : "=r" (*err), EAX_EDX_RET(val, low, high)
- : "c" (msr), "D" (0x9c5a203a), "i" (-EFAULT));
+ : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
+ : "c" (msr), "D" (0x9c5a203a), [fault] "i" (-EFAULT));
return EAX_EDX_VAL(val, low, high);
}

@@ -111,6 +111,25 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
return err;
}

+static inline unsigned long long native_write_msr_amd_safe(unsigned int msr,
+ unsigned low,
+ unsigned high)
+{
+ int err;
+ asm volatile("2: wrmsr ; xor %[err],%[err]\n"
+ "1:\n\t"
+ ".section .fixup,\"ax\"\n\t"
+ "3: mov %[fault],%[err] ; jmp 1b\n\t"
+ ".previous\n\t"
+ _ASM_EXTABLE(2b, 3b)
+ : [err] "=a" (err)
+ : "c" (msr), "0" (low), "d" (high), [fault] "i" (-EFAULT),
+ "D" (0x9c5a203a)
+ : "memory");
+ return err;
+
+}
+
extern unsigned long long native_read_tsc(void);

static __always_inline unsigned long long __native_read_tsc(void)
@@ -164,6 +183,11 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
return native_write_msr_safe(msr, low, high);
}

+static inline int wrmsr_amd_safe(unsigned msr, unsigned low, unsigned high)
+{
+ return native_write_msr_amd_safe(msr, low, high);
+}
+
/* rdmsr with exception handling */
#define rdmsr_safe(msr, p1, p2) \
({ \
--
1.6.3.3