[PATCH 0/8 v5] x86: Adapt CPU topology detection for AMD Magny-Cours

[PATCH 0/8 v5] x86: Adapt CPU topology detection for AMD Magny-Cours

[Andreas Herrmann]

Changes to previous patch set:
- added patch to swap semantic of cpu_node_siblings and core_siblings
- new patch to convert alloc/clear of cpumask to zalloc
- added patch to update cputopology documentation

Current patch set contains 8 patches:
- patch 1 adapts common code to show cpu_node_id,
  cpu_node_siblings and cpu_node_siblings_list in
  /sys/devices/system/cpu/cpu*/topology
- patch 2 prepares arch/x86 to provide cpu_node information
- patch 3 sets up cpu_node information for AMD Magny-Cours CPU
- patch 4 swap semantic of cpu_node_siblings and core_siblings
- patch 5 fixes L3 cache information for Magny-Cours
- patch 6 fixes mcheck code for Magny-Cours
- patch 7 alloc/clear to zalloc conversion
- patch 8 documentation update

Note that scheduler adaptions are still under construction/test.
(I'll have to adapt domain hierarchy to the semantic change.)


Patches are against tip/master.
Please apply.

Thanks,

Andreas

PS: See http://marc.info/?l=linux-kernel&m=124948708626238 for
    previous patch submission.

[PATCH 1/8] topology: Introduce cpu_node information for multi-node processors

[Andreas Herrmann]

This includes
- cpu_node_id (id of the internal node)
- cpu_node_siblings and cpu_node_siblings_list
  (siblings on the same internal node)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 drivers/base/topology.c  |   10 ++++++++++
 include/linux/topology.h |    9 +++++++++
 2 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/drivers/base/topology.c b/drivers/base/topology.c
index bf6b132..1e35a43 100644
--- a/drivers/base/topology.c
+++ b/drivers/base/topology.c
@@ -103,6 +103,9 @@ static ssize_t show_##name##_list(struct sys_device *dev,		\
 define_id_show_func(physical_package_id);
 define_one_ro(physical_package_id);
 
+define_id_show_func(cpu_node_id);
+define_one_ro(cpu_node_id);
+
 define_id_show_func(core_id);
 define_one_ro(core_id);
 
@@ -110,6 +113,10 @@ define_siblings_show_func(thread_cpumask);
 define_one_ro_named(thread_siblings, show_thread_cpumask);
 define_one_ro_named(thread_siblings_list, show_thread_cpumask_list);
 
+define_siblings_show_func(cpu_node_cpumask);
+define_one_ro_named(cpu_node_siblings, show_cpu_node_cpumask);
+define_one_ro_named(cpu_node_siblings_list, show_cpu_node_cpumask_list);
+
 define_siblings_show_func(core_cpumask);
 define_one_ro_named(core_siblings, show_core_cpumask);
 define_one_ro_named(core_siblings_list, show_core_cpumask_list);
@@ -119,6 +126,9 @@ static struct attribute *default_attrs[] = {
 	&attr_core_id.attr,
 	&attr_thread_siblings.attr,
 	&attr_thread_siblings_list.attr,
+	&attr_cpu_node_id.attr,
+	&attr_cpu_node_siblings.attr,
+	&attr_cpu_node_siblings_list.attr,
 	&attr_core_siblings.attr,
 	&attr_core_siblings_list.attr,
 	NULL
diff --git a/include/linux/topology.h b/include/linux/topology.h
index 7402c1a..976a130 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -180,6 +180,9 @@ int arch_update_cpu_topology(void);
 #ifndef topology_physical_package_id
 #define topology_physical_package_id(cpu)	((void)(cpu), -1)
 #endif
+#ifndef topology_cpu_node_id
+#define topology_cpu_node_id(cpu)		((void)(cpu), 0)
+#endif
 #ifndef topology_core_id
 #define topology_core_id(cpu)			((void)(cpu), 0)
 #endif
@@ -189,12 +192,18 @@ int arch_update_cpu_topology(void);
 #ifndef topology_core_siblings
 #define topology_core_siblings(cpu)		cpumask_of_cpu(cpu)
 #endif
+#ifndef topology_cpu_node_siblings
+#define topology_cpu_node_siblings(cpu)		topology_core_siblings(cpu)
+#endif
 #ifndef topology_thread_cpumask
 #define topology_thread_cpumask(cpu)		cpumask_of(cpu)
 #endif
 #ifndef topology_core_cpumask
 #define topology_core_cpumask(cpu)		cpumask_of(cpu)
 #endif
+#ifndef topology_cpu_node_cpumask
+#define topology_cpu_node_cpumask(cpu)		topology_core_cpumask(cpu)
+#endif
 
 /* Returns the number of the current Node. */
 #ifndef numa_node_id
-- 
1.6.3.3

[PATCH 2/8] x86: Provide CPU topology information for multi-node processors

[Andreas Herrmann]

Provide topology_cpu_node_id, topology_cpu_node_mask and cpu_node_map.
CPUs with matching phys_proc_id and cpu_node_id belong to the same
cpu_node.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/include/asm/processor.h |    2 ++
 arch/x86/include/asm/smp.h       |    6 ++++++
 arch/x86/include/asm/topology.h  |    2 ++
 arch/x86/kernel/cpu/common.c     |    2 ++
 arch/x86/kernel/cpu/proc.c       |    1 +
 arch/x86/kernel/smpboot.c        |   13 +++++++++++++
 6 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index 2b03f70..0e0b363 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -107,6 +107,8 @@ struct cpuinfo_x86 {
 	u16			booted_cores;
 	/* Physical processor id: */
 	u16			phys_proc_id;
+	/* Node id in case of multi-node processor: */
+	u16			cpu_node_id;
 	/* Core id: */
 	u16			cpu_core_id;
 	/* Index into per_cpu list: */
diff --git a/arch/x86/include/asm/smp.h b/arch/x86/include/asm/smp.h
index 6a84ed1..aad37c6 100644
--- a/arch/x86/include/asm/smp.h
+++ b/arch/x86/include/asm/smp.h
@@ -22,6 +22,7 @@ extern int smp_num_siblings;
 extern unsigned int num_processors;
 
 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
+DECLARE_PER_CPU(cpumask_var_t, cpu_node_map);
 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
 DECLARE_PER_CPU(u16, cpu_llc_id);
 DECLARE_PER_CPU(int, cpu_number);
@@ -31,6 +32,11 @@ static inline struct cpumask *cpu_sibling_mask(int cpu)
 	return per_cpu(cpu_sibling_map, cpu);
 }
 
+static inline struct cpumask *cpu_node_mask(int cpu)
+{
+	return per_cpu(cpu_node_map, cpu);
+}
+
 static inline struct cpumask *cpu_core_mask(int cpu)
 {
 	return per_cpu(cpu_core_map, cpu);
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 066ef59..9eddb69 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -190,6 +190,8 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu);
 #define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
 #define topology_core_cpumask(cpu)		(per_cpu(cpu_core_map, cpu))
 #define topology_thread_cpumask(cpu)		(per_cpu(cpu_sibling_map, cpu))
+#define topology_cpu_node_id(cpu)		(cpu_data(cpu).cpu_node_id)
+#define topology_cpu_node_cpumask(cpu)		(per_cpu(cpu_node_map, cpu))
 
 /* indicates that pointers to the topology cpumask_t maps are valid */
 #define arch_provides_topology_pointers		yes
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 6210c84..6b3c67e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -478,6 +478,8 @@ out:
 	if ((c->x86_max_cores * smp_num_siblings) > 1) {
 		printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 		       c->phys_proc_id);
+		printk(KERN_INFO  "CPU: Processor Node ID: %d\n",
+		       c->cpu_node_id);
 		printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
 		       c->cpu_core_id);
 	}
diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c
index 62ac8cb..a098d78 100644
--- a/arch/x86/kernel/cpu/proc.c
+++ b/arch/x86/kernel/cpu/proc.c
@@ -15,6 +15,7 @@ static void show_cpuinfo_core(struct seq_file *m, struct cpuinfo_x86 *c,
 		seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
 		seq_printf(m, "siblings\t: %d\n",
 			   cpumask_weight(cpu_core_mask(cpu)));
+		seq_printf(m, "node id\t\t: %d\n", c->cpu_node_id);
 		seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
 		seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
 		seq_printf(m, "apicid\t\t: %d\n", c->apicid);
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index dee0f3d..f50af56 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -109,6 +109,10 @@ EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
 DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
 EXPORT_PER_CPU_SYMBOL(cpu_core_map);
 
+/* representing node silbings on multi-node CPU */
+DEFINE_PER_CPU(cpumask_var_t, cpu_node_map);
+EXPORT_PER_CPU_SYMBOL(cpu_node_map);
+
 /* Per CPU bogomips and other parameters */
 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
 EXPORT_PER_CPU_SYMBOL(cpu_info);
@@ -403,6 +407,11 @@ void __cpuinit set_cpu_sibling_map(int cpu)
 			cpumask_set_cpu(i, c->llc_shared_map);
 			cpumask_set_cpu(cpu, cpu_data(i).llc_shared_map);
 		}
+		if ((c->phys_proc_id == cpu_data(i).phys_proc_id) &&
+		    (c->cpu_node_id == cpu_data(i).cpu_node_id)) {
+			cpumask_set_cpu(i, cpu_node_mask(cpu));
+			cpumask_set_cpu(cpu, cpu_node_mask(i));
+		}
 		if (c->phys_proc_id == cpu_data(i).phys_proc_id) {
 			cpumask_set_cpu(i, cpu_core_mask(cpu));
 			cpumask_set_cpu(cpu, cpu_core_mask(i));
@@ -1061,8 +1070,10 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 	for_each_possible_cpu(i) {
 		alloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
 		alloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
+		alloc_cpumask_var(&per_cpu(cpu_node_map, i), GFP_KERNEL);
 		alloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
 		cpumask_clear(per_cpu(cpu_core_map, i));
+		cpumask_clear(per_cpu(cpu_node_map, i));
 		cpumask_clear(per_cpu(cpu_sibling_map, i));
 		cpumask_clear(cpu_data(i).llc_shared_map);
 	}
@@ -1210,6 +1221,7 @@ static void remove_siblinginfo(int cpu)
 
 	for_each_cpu(sibling, cpu_core_mask(cpu)) {
 		cpumask_clear_cpu(cpu, cpu_core_mask(sibling));
+		cpumask_clear_cpu(cpu, cpu_node_mask(sibling));
 		/*/
 		 * last thread sibling in this cpu core going down
 		 */
@@ -1222,6 +1234,7 @@ static void remove_siblinginfo(int cpu)
 	cpumask_clear(cpu_sibling_mask(cpu));
 	cpumask_clear(cpu_core_mask(cpu));
 	c->phys_proc_id = 0;
+	c->cpu_node_id = 0;
 	c->cpu_core_id = 0;
 	cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
 }
-- 
1.6.3.3

[PATCH 3/8] x86: Add cpu_node topology detection for AMD Magny-Cours

[Andreas Herrmann]

This adapts CPU topology detection for AMD Magny-Cours.

Here is example output from two cores on same package but different
internal cpu_nodes:

/sys/devices/system/cpu/cpu5:
  physical_package_id        : 0
  core_id                    : 5
  thread_siblings            : 00000020
  thread_siblings_list       : 5
  cpu_node_id                : 0
  cpu_node_siblings          : 0000003f
  cpu_node_siblings_list     : 0-5
  core_siblings              : 00000fff
  core_siblings_list         : 0-11
/sys/devices/system/cpu/cpu6:
  physical_package_id        : 0
  core_id                    : 0
  thread_siblings            : 00000040
  thread_siblings_list       : 6
  cpu_node_id                : 1
  cpu_node_siblings          : 00000fc0
  cpu_node_siblings_list     : 6-11
  core_siblings              : 00000fff
  core_siblings_list         : 0-11

Included allnoconfig compile fix by Nicolas Palix <npalix@diku.dk>.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 arch/x86/kernel/cpu/amd.c         |   69 +++++++++++++++++++++++++++++++++++-
 2 files changed, 68 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 4a28d22..847fee6 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -95,6 +95,7 @@
 #define X86_FEATURE_NONSTOP_TSC	(3*32+24) /* TSC does not stop in C states */
 #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
 #define X86_FEATURE_EXTD_APICID	(3*32+26) /* has extended APICID (8 bits) */
+#define X86_FEATURE_AMD_DCM     (3*32+27) /* multi-node processor */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3	(4*32+ 0) /* "pni" SSE-3 */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index ec6c7a8..f18ece1 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -253,6 +253,60 @@ static int __cpuinit nearby_node(int apicid)
 #endif
 
 /*
+ * Fixup core topology information for AMD multi-node processors.
+ * Assumption 1: Number of cores in each internal node is the same.
+ * Assumption 2: Mixed systems with both single-node and dual-node
+ *               processors are not supported.
+ */
+#ifdef CONFIG_X86_HT
+static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c)
+{
+#ifdef CONFIG_PCI
+	u32 t, cpn;
+	u8 n;
+
+	/* fixup topology information only once for a core */
+	if (cpu_has(c, X86_FEATURE_AMD_DCM))
+		return;
+
+	/* check for multi-node processor on boot cpu */
+	t = read_pci_config(0, 24, 3, 0xe8);
+	if (!(t & (1 << 29)))
+		return;
+
+	set_cpu_cap(c, X86_FEATURE_AMD_DCM);
+
+	/* cores per node: each internal node has half the number of cores */
+	cpn = c->x86_max_cores >> 1;
+
+	/* even-numbered NB_id of this dual-node processor */
+	n = c->phys_proc_id << 1;
+
+	/*
+	 * determine internal node id and assign cores fifty-fifty to
+	 * each node of the dual-node processor
+	 */
+	t = read_pci_config(0, 24 + n, 3, 0xe8);
+	n = (t>>30) & 0x3;
+	if (n == 0) {
+		if (c->cpu_core_id < cpn)
+			c->cpu_node_id = 0;
+		else
+			c->cpu_node_id = 1;
+	} else {
+		if (c->cpu_core_id < cpn)
+			c->cpu_node_id = 1;
+		else
+			c->cpu_node_id = 0;
+	}
+
+	 /* fixup core id to be in range from 0 to cpn */
+	c->cpu_core_id = c->cpu_core_id % cpn;
+#endif
+}
+#endif
+
+/*
  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
  * Assumes number of cores is a power of two.
  */
@@ -267,8 +321,15 @@ static void __cpuinit amd_detect_cmp(struct cpuinfo_x86 *c)
 	c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);
 	/* Convert the initial APIC ID into the socket ID */
 	c->phys_proc_id = c->initial_apicid >> bits;
+	/* fixup topology information on multi-node processors */
+	if ((c->x86 == 0x10) && (c->x86_model == 9))
+		amd_fixup_dcm(c);
 	/* use socket ID also for last level cache */
-	per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
+	if (cpu_has(c, X86_FEATURE_AMD_DCM))
+		per_cpu(cpu_llc_id, cpu) = (c->phys_proc_id << 1) +
+		  c->cpu_node_id;
+	else
+		per_cpu(cpu_llc_id, cpu) = c->phys_proc_id;
 #endif
 }
 
@@ -279,7 +340,11 @@ static void __cpuinit srat_detect_node(struct cpuinfo_x86 *c)
 	int node;
 	unsigned apicid = cpu_has_apic ? hard_smp_processor_id() : c->apicid;
 
-	node = c->phys_proc_id;
+	if (cpu_has(c, X86_FEATURE_AMD_DCM))
+		node = (c->phys_proc_id << 1) + c->cpu_node_id;
+	else
+		node = c->phys_proc_id;
+
 	if (apicid_to_node[apicid] != NUMA_NO_NODE)
 		node = apicid_to_node[apicid];
 	if (!node_online(node)) {
-- 
1.6.3.3

[PATCH 4/8] x86, topology: Swap semantic of core_siblings and cpu_node_siblings

[Andreas Herrmann]

Brice Goglin suggested to use the following semantic for
CPU topology information

  Level        | Set of CPUs
 --------------|---------------
  phys_package | cpu_node_siblings
  cpu_node     | core_siblings
  core         | thread_siblings
  thread       | one CPU

Done that.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/include/asm/topology.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 9eddb69..d53ef91 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -188,10 +188,10 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu);
 #ifdef ENABLE_TOPO_DEFINES
 #define topology_physical_package_id(cpu)	(cpu_data(cpu).phys_proc_id)
 #define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)
-#define topology_core_cpumask(cpu)		(per_cpu(cpu_core_map, cpu))
+#define topology_core_cpumask(cpu)		(per_cpu(cpu_node_map, cpu))
 #define topology_thread_cpumask(cpu)		(per_cpu(cpu_sibling_map, cpu))
 #define topology_cpu_node_id(cpu)		(cpu_data(cpu).cpu_node_id)
-#define topology_cpu_node_cpumask(cpu)		(per_cpu(cpu_node_map, cpu))
+#define topology_cpu_node_cpumask(cpu)		(per_cpu(cpu_core_map, cpu))
 
 /* indicates that pointers to the topology cpumask_t maps are valid */
 #define arch_provides_topology_pointers		yes
-- 
1.6.3.3

[PATCH 5/8] x86, cacheinfo: Fixup L3 cache information for AMD multi-node processors

[Andreas Herrmann]

L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/kernel/cpu/intel_cacheinfo.c |   30 ++++++++++++++++++++----------
 1 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 306bf0d..4fa232a 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -241,7 +241,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 	case 0:
 		if (!l1->val)
 			return;
-		assoc = l1->assoc;
+		assoc = assocs[l1->assoc];
 		line_size = l1->line_size;
 		lines_per_tag = l1->lines_per_tag;
 		size_in_kb = l1->size_in_kb;
@@ -249,7 +249,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 	case 2:
 		if (!l2.val)
 			return;
-		assoc = l2.assoc;
+		assoc = assocs[l2.assoc];
 		line_size = l2.line_size;
 		lines_per_tag = l2.lines_per_tag;
 		/* cpu_data has errata corrections for K7 applied */
@@ -258,10 +258,14 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 	case 3:
 		if (!l3.val)
 			return;
-		assoc = l3.assoc;
+		assoc = assocs[l3.assoc];
 		line_size = l3.line_size;
 		lines_per_tag = l3.lines_per_tag;
 		size_in_kb = l3.size_encoded * 512;
+		if (boot_cpu_has(X86_FEATURE_AMD_DCM)) {
+			size_in_kb = size_in_kb >> 1;
+			assoc = assoc >> 1;
+		}
 		break;
 	default:
 		return;
@@ -270,18 +274,14 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
 	eax->split.is_self_initializing = 1;
 	eax->split.type = types[leaf];
 	eax->split.level = levels[leaf];
-	if (leaf == 3)
-		eax->split.num_threads_sharing =
-			current_cpu_data.x86_max_cores - 1;
-	else
-		eax->split.num_threads_sharing = 0;
+	eax->split.num_threads_sharing = 0;
 	eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
 
 
-	if (assoc == 0xf)
+	if (assoc == 0xffff)
 		eax->split.is_fully_associative = 1;
 	ebx->split.coherency_line_size = line_size - 1;
-	ebx->split.ways_of_associativity = assocs[assoc] - 1;
+	ebx->split.ways_of_associativity = assoc - 1;
 	ebx->split.physical_line_partition = lines_per_tag - 1;
 	ecx->split.number_of_sets = (size_in_kb * 1024) / line_size /
 		(ebx->split.ways_of_associativity + 1) - 1;
@@ -523,6 +523,16 @@ static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
 	int index_msb, i;
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
 
+	if ((index == 3) && (c->x86_vendor == X86_VENDOR_AMD)) {
+		for_each_online_cpu(i) {
+			if (!per_cpu(cpuid4_info, i))
+				continue;
+			this_leaf = CPUID4_INFO_IDX(i, index);
+			cpumask_copy(to_cpumask(this_leaf->shared_cpu_map),
+				     topology_core_cpumask(i));
+		}
+		return;
+	}
 	this_leaf = CPUID4_INFO_IDX(cpu, index);
 	num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
 
-- 
1.6.3.3

[PATCH 6/8] x86, mcheck: Make use of cpu_node_mask instead of cpu_core_mask

[Andreas Herrmann]

This fixes threshold_bank4 support on multi-node processors.

We need to create 2 sets of symlinks for sibling shared banks -- one
set for each internal node, symlinks of each set should target the
first core on same internal node.

Currently only one set is created where all symlinks are targeting
the first core of the entire socket.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index ddae216..595cbe5 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -494,7 +494,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 
 #ifdef CONFIG_SMP
 	if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) {	/* symlink */
-		i = cpumask_first(cpu_core_mask(cpu));
+		i = cpumask_first(cpu_node_mask(cpu));
 
 		/* first core not up yet */
 		if (cpu_data(i).cpu_core_id)
@@ -514,7 +514,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 		if (err)
 			goto out;
 
-		cpumask_copy(b->cpus, cpu_core_mask(cpu));
+		cpumask_copy(b->cpus, cpu_node_mask(cpu));
 		per_cpu(threshold_banks, cpu)[bank] = b;
 
 		goto out;
@@ -539,7 +539,7 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
 #ifndef CONFIG_SMP
 	cpumask_setall(b->cpus);
 #else
-	cpumask_copy(b->cpus, cpu_core_mask(cpu));
+	cpumask_copy(b->cpus, cpu_node_mask(cpu));
 #endif
 
 	per_cpu(threshold_banks, cpu)[bank] = b;
-- 
1.6.3.3

[PATCH 7/8] x86, smpboot: use zalloc_cpumask_var instead of alloc/clear

[Andreas Herrmann]

Suggested-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 arch/x86/kernel/smpboot.c |   12 ++++--------
 1 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index f50af56..f797214 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -1068,14 +1068,10 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
 #endif
 	current_thread_info()->cpu = 0;  /* needed? */
 	for_each_possible_cpu(i) {
-		alloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
-		alloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
-		alloc_cpumask_var(&per_cpu(cpu_node_map, i), GFP_KERNEL);
-		alloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
-		cpumask_clear(per_cpu(cpu_core_map, i));
-		cpumask_clear(per_cpu(cpu_node_map, i));
-		cpumask_clear(per_cpu(cpu_sibling_map, i));
-		cpumask_clear(cpu_data(i).llc_shared_map);
+		zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
+		zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
+		zalloc_cpumask_var(&per_cpu(cpu_node_map, i), GFP_KERNEL);
+		zalloc_cpumask_var(&cpu_data(i).llc_shared_map, GFP_KERNEL);
 	}
 	set_cpu_sibling_map(0);
 
-- 
1.6.3.3

[PATCH 8/8] topology: Update CPU topology documentation

[Andreas Herrmann]

Mention new attributes introduced for multi-node processor support.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
---
 Documentation/cputopology.txt |   35 +++++++++++++++++++++++++++++------
 1 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/Documentation/cputopology.txt b/Documentation/cputopology.txt
index b41f3e5..48914b1 100644
--- a/Documentation/cputopology.txt
+++ b/Documentation/cputopology.txt
@@ -3,13 +3,32 @@ Export cpu topology info via sysfs. Items (attributes) are similar
 to /proc/cpuinfo.
 
 1) /sys/devices/system/cpu/cpuX/topology/physical_package_id:
-represent the physical package id of  cpu X;
+   represents the physical package id of cpu X;
 2) /sys/devices/system/cpu/cpuX/topology/core_id:
-represent the cpu core id to cpu X;
-3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
-represent the thread siblings to cpu X in the same core;
-4) /sys/devices/system/cpu/cpuX/topology/core_siblings:
-represent the thread siblings to cpu X in the same physical package;
+   represents the cpu core id of cpu X;
+3) /sys/devices/system/cpu/cpuX/topology/cpu_node_id:
+   represents the processor internal node_id of cpu X;
+4) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
+   represents the thread siblings of cpu X in the same core;
+5) /sys/devices/system/cpu/cpuX/topology/core_siblings:
+   represents the thread siblings of cpu X in the same processor
+   internal node;
+6) /sys/devices/system/cpu/cpuX/topology/cpu_node_siblings:
+   represents the thread siblings of cpu X in the same physical
+   package;
+
+Note: cpu_node_siblings and core_siblings differ only on
+      multi-node processors. On all other processors they are
+      identical and then cpu_node_id is always 0.
+
+With that CPU topology is mapped into following hierarchy:
+
+  Level        | Set of CPUs
+ --------------|---------------
+  phys_package | cpu_node_siblings
+  cpu_node     | core_siblings
+  core         | thread_siblings
+  thread       | one CPU
 
 To implement it in an architecture-neutral way, a new source file,
 drivers/base/topology.c, is to export the 4 attributes.
@@ -20,6 +39,8 @@ these macros in include/asm-XXX/topology.h:
 #define topology_core_id(cpu)
 #define topology_thread_cpumask(cpu)
 #define topology_core_cpumask(cpu)
+#define topology_cpu_node_id(cpu)
+#define topology_cpu_node_siblings(cpu)
 
 The type of **_id is int.
 The type of siblings is (const) struct cpumask *.
@@ -31,6 +52,8 @@ not defined by include/asm-XXX/topology.h:
 2) core_id: 0
 3) thread_siblings: just the given CPU
 4) core_siblings: just the given CPU
+5) cpu_node_id: 0
+6) cpu_node_siblings: identical to core_siblings
 
 Additionally, cpu topology information is provided under
 /sys/devices/system/cpu and includes these files.  The internal
-- 
1.6.3.3

Re: [PATCH 0/8 v5] x86: Adapt CPU topology detection for AMD Magny-Cours

[Alex Chiang]

Hi Andreas,

* Andreas Herrmann <andreas.herrmann3@amd.com>:
> Changes to previous patch set:
> - added patch to swap semantic of cpu_node_siblings and core_siblings
> - new patch to convert alloc/clear of cpumask to zalloc
> - added patch to update cputopology documentation
> 
> Current patch set contains 8 patches:
> - patch 1 adapts common code to show cpu_node_id,
>   cpu_node_siblings and cpu_node_siblings_list in
>   /sys/devices/system/cpu/cpu*/topology
> - patch 2 prepares arch/x86 to provide cpu_node information
> - patch 3 sets up cpu_node information for AMD Magny-Cours CPU

Do only Magny-Cours have the concept of a 'node' or should
Istanbul have nodes too?

Here is the output of my system with your patchset applied.
First, a representative entry from /proc/cpuinfo.

processor	: 0
vendor_id	: AuthenticAMD
cpu family	: 16
model		: 8
model name	: Six-Core AMD Opteron(tm) Processor 8439 SE
stepping	: 0
cpu MHz		: 800.000
cache size	: 512 KB
physical id	: 0
siblings	: 6
node id		: 0
core id		: 0
cpu cores	: 6
apicid		: 0
initial apicid	: 0
fpu		: yes
fpu_exception	: yes
cpuid level	: 5
wp		: yes
flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nonstop_tsc extd_apicid pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt
bogomips	: 5586.65
TLB size	: 1024 4K pages
clflush size	: 64
cache_alignment	: 64
address sizes	: 48 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate

I do have the powernow_k8 module loaded too (so ignore the funny
MHz output).

# lsmod | grep k8
powernow_k8            13764  0 
processor              47724  1 powernow_k8

Here is the output with just a few fields selected.

# cat /proc/cpuinfo | egrep '^node|^core|processor|^physical|apicid' 
processor	: 0
physical id	: 0
node id		: 0
core id		: 0
apicid		: 0
initial apicid	: 0
processor	: 1
physical id	: 1
node id		: 0
core id		: 0
apicid		: 8
initial apicid	: 8
processor	: 2
physical id	: 2
node id		: 0
core id		: 0
apicid		: 16
initial apicid	: 16
processor	: 3
physical id	: 3
node id		: 0
core id		: 0
apicid		: 24
initial apicid	: 24
processor	: 4
physical id	: 4
node id		: 0
core id		: 0
apicid		: 32
initial apicid	: 32
processor	: 5
physical id	: 5
node id		: 0
core id		: 0
apicid		: 40
initial apicid	: 40
processor	: 6
physical id	: 6
node id		: 0
core id		: 0
apicid		: 48
initial apicid	: 48
processor	: 7
physical id	: 7
node id		: 0
core id		: 0
apicid		: 56
initial apicid	: 56
processor	: 8
physical id	: 0
node id		: 0
core id		: 1
apicid		: 1
initial apicid	: 1
processor	: 9
physical id	: 1
node id		: 0
core id		: 1
apicid		: 9
initial apicid	: 9
processor	: 10
physical id	: 2
node id		: 0
core id		: 1
apicid		: 17
initial apicid	: 17
processor	: 11
physical id	: 3
node id		: 0
core id		: 1
apicid		: 25
initial apicid	: 25
processor	: 12
physical id	: 4
node id		: 0
core id		: 1
apicid		: 33
initial apicid	: 33
processor	: 13
physical id	: 5
node id		: 0
core id		: 1
apicid		: 41
initial apicid	: 41
processor	: 14
physical id	: 6
node id		: 0
core id		: 1
apicid		: 49
initial apicid	: 49
processor	: 15
physical id	: 7
node id		: 0
core id		: 1
apicid		: 57
initial apicid	: 57
processor	: 16
physical id	: 0
node id		: 0
core id		: 2
apicid		: 2
initial apicid	: 2
processor	: 17
physical id	: 1
node id		: 0
core id		: 2
apicid		: 10
initial apicid	: 10
processor	: 18
physical id	: 2
node id		: 0
core id		: 2
apicid		: 18
initial apicid	: 18
processor	: 19
physical id	: 3
node id		: 0
core id		: 2
apicid		: 26
initial apicid	: 26
processor	: 20
physical id	: 4
node id		: 0
core id		: 2
apicid		: 34
initial apicid	: 34
processor	: 21
physical id	: 5
node id		: 0
core id		: 2
apicid		: 42
initial apicid	: 42
processor	: 22
physical id	: 6
node id		: 0
core id		: 2
apicid		: 50
initial apicid	: 50
processor	: 23
physical id	: 7
node id		: 0
core id		: 2
apicid		: 58
initial apicid	: 58
processor	: 24
physical id	: 0
node id		: 0
core id		: 3
apicid		: 3
initial apicid	: 3
processor	: 25
physical id	: 1
node id		: 0
core id		: 3
apicid		: 11
initial apicid	: 11
processor	: 26
physical id	: 2
node id		: 0
core id		: 3
apicid		: 19
initial apicid	: 19
processor	: 27
physical id	: 3
node id		: 0
core id		: 3
apicid		: 27
initial apicid	: 27
processor	: 28
physical id	: 4
node id		: 0
core id		: 3
apicid		: 35
initial apicid	: 35
processor	: 29
physical id	: 5
node id		: 0
core id		: 3
apicid		: 43
initial apicid	: 43
processor	: 30
physical id	: 6
node id		: 0
core id		: 3
apicid		: 51
initial apicid	: 51
processor	: 31
physical id	: 7
node id		: 0
core id		: 3
apicid		: 59
initial apicid	: 59
processor	: 32
physical id	: 0
node id		: 0
core id		: 4
apicid		: 4
initial apicid	: 4
processor	: 33
physical id	: 1
node id		: 0
core id		: 4
apicid		: 12
initial apicid	: 12
processor	: 34
physical id	: 2
node id		: 0
core id		: 4
apicid		: 20
initial apicid	: 20
processor	: 35
physical id	: 3
node id		: 0
core id		: 4
apicid		: 28
initial apicid	: 28
processor	: 36
physical id	: 4
node id		: 0
core id		: 4
apicid		: 36
initial apicid	: 36
processor	: 37
physical id	: 5
node id		: 0
core id		: 4
apicid		: 44
initial apicid	: 44
processor	: 38
physical id	: 6
node id		: 0
core id		: 4
apicid		: 52
initial apicid	: 52
processor	: 39
physical id	: 7
node id		: 0
core id		: 4
apicid		: 60
initial apicid	: 60
processor	: 40
physical id	: 0
node id		: 0
core id		: 5
apicid		: 5
initial apicid	: 5
processor	: 41
physical id	: 1
node id		: 0
core id		: 5
apicid		: 13
initial apicid	: 13
processor	: 42
physical id	: 2
node id		: 0
core id		: 5
apicid		: 21
initial apicid	: 21
processor	: 43
physical id	: 3
node id		: 0
core id		: 5
apicid		: 29
initial apicid	: 29
processor	: 44
physical id	: 4
node id		: 0
core id		: 5
apicid		: 37
initial apicid	: 37
processor	: 45
physical id	: 5
node id		: 0
core id		: 5
apicid		: 45
initial apicid	: 45
processor	: 46
physical id	: 6
node id		: 0
core id		: 5
apicid		: 53
initial apicid	: 53
processor	: 47
physical id	: 7
node id		: 0
core id		: 5
apicid		: 61
initial apicid	: 61

Thanks.

/ac

Re: [PATCH 0/8 v5] x86: Adapt CPU topology detection for AMD Magny-Cours

[Andreas Herrmann]

On Wed, Aug 12, 2009 at 05:22:07PM -0600, Alex Chiang wrote:
> Hi Andreas,
> 
> * Andreas Herrmann <andreas.herrmann3@amd.com>:
> > Changes to previous patch set:
> > - added patch to swap semantic of cpu_node_siblings and core_siblings
> > - new patch to convert alloc/clear of cpumask to zalloc
> > - added patch to update cputopology documentation
> > 
> > Current patch set contains 8 patches:
> > - patch 1 adapts common code to show cpu_node_id,
> >   cpu_node_siblings and cpu_node_siblings_list in
> >   /sys/devices/system/cpu/cpu*/topology
> > - patch 2 prepares arch/x86 to provide cpu_node information
> > - patch 3 sets up cpu_node information for AMD Magny-Cours CPU
> 
> Do only Magny-Cours have the concept of a 'node' or should
> Istanbul have nodes too?

Magny-Cours will be the first AMD processor having two internal nodes.
Istanbul is one node per socket. See your output, node_id is always 0.
You have 6 cores per socket. And with each socket (every 6 cores)
the physical_id changes.

With Magny-Cours up 12 cores will have the same physical_id as they
are all on the same socket. But 6 cores out of that will have node_id
0 and the other 6 cores will have node_id 1.


Regards,
Andreas

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> Here is the output of my system with your patchset applied.
> First, a representative entry from /proc/cpuinfo.
> 
> processor	: 0
> vendor_id	: AuthenticAMD
> cpu family	: 16
> model		: 8
> model name	: Six-Core AMD Opteron(tm) Processor 8439 SE
> stepping	: 0
> cpu MHz		: 800.000
> cache size	: 512 KB
> physical id	: 0
> siblings	: 6
> node id		: 0
> core id		: 0
> cpu cores	: 6
> apicid		: 0
> initial apicid	: 0
> fpu		: yes
> fpu_exception	: yes
> cpuid level	: 5
> wp		: yes
> flags		: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall mmxext fxsr_opt pdpe1gb rdtscp lm 3dnowext 3dnow constant_tsc rep_good nonstop_tsc extd_apicid pni monitor cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt
> bogomips	: 5586.65
> TLB size	: 1024 4K pages
> clflush size	: 64
> cache_alignment	: 64
> address sizes	: 48 bits physical, 48 bits virtual
> power management: ts ttp tm stc 100mhzsteps hwpstate
> 
> I do have the powernow_k8 module loaded too (so ignore the funny
> MHz output).
> 
> # lsmod | grep k8
> powernow_k8            13764  0 
> processor              47724  1 powernow_k8
> 
> Here is the output with just a few fields selected.
> 
> # cat /proc/cpuinfo | egrep '^node|^core|processor|^physical|apicid' 
> processor	: 0
> physical id	: 0
> node id		: 0
> core id		: 0
> apicid		: 0
> initial apicid	: 0
> processor	: 1
> physical id	: 1
> node id		: 0
> core id		: 0
> apicid		: 8
> initial apicid	: 8
> processor	: 2
> physical id	: 2
> node id		: 0
> core id		: 0
> apicid		: 16
> initial apicid	: 16
> processor	: 3
> physical id	: 3
> node id		: 0
> core id		: 0
> apicid		: 24
> initial apicid	: 24
> processor	: 4
> physical id	: 4
> node id		: 0
> core id		: 0
> apicid		: 32
> initial apicid	: 32
> processor	: 5
> physical id	: 5
> node id		: 0
> core id		: 0
> apicid		: 40
> initial apicid	: 40
> processor	: 6
> physical id	: 6
> node id		: 0
> core id		: 0
> apicid		: 48
> initial apicid	: 48
> processor	: 7
> physical id	: 7
> node id		: 0
> core id		: 0
> apicid		: 56
> initial apicid	: 56
> processor	: 8
> physical id	: 0
> node id		: 0
> core id		: 1
> apicid		: 1
> initial apicid	: 1
> processor	: 9
> physical id	: 1
> node id		: 0
> core id		: 1
> apicid		: 9
> initial apicid	: 9
> processor	: 10
> physical id	: 2
> node id		: 0
> core id		: 1
> apicid		: 17
> initial apicid	: 17
> processor	: 11
> physical id	: 3
> node id		: 0
> core id		: 1
> apicid		: 25
> initial apicid	: 25
> processor	: 12
> physical id	: 4
> node id		: 0
> core id		: 1
> apicid		: 33
> initial apicid	: 33
> processor	: 13
> physical id	: 5
> node id		: 0
> core id		: 1
> apicid		: 41
> initial apicid	: 41
> processor	: 14
> physical id	: 6
> node id		: 0
> core id		: 1
> apicid		: 49
> initial apicid	: 49
> processor	: 15
> physical id	: 7
> node id		: 0
> core id		: 1
> apicid		: 57
> initial apicid	: 57
> processor	: 16
> physical id	: 0
> node id		: 0
> core id		: 2
> apicid		: 2
> initial apicid	: 2
> processor	: 17
> physical id	: 1
> node id		: 0
> core id		: 2
> apicid		: 10
> initial apicid	: 10
> processor	: 18
> physical id	: 2
> node id		: 0
> core id		: 2
> apicid		: 18
> initial apicid	: 18
> processor	: 19
> physical id	: 3
> node id		: 0
> core id		: 2
> apicid		: 26
> initial apicid	: 26
> processor	: 20
> physical id	: 4
> node id		: 0
> core id		: 2
> apicid		: 34
> initial apicid	: 34
> processor	: 21
> physical id	: 5
> node id		: 0
> core id		: 2
> apicid		: 42
> initial apicid	: 42
> processor	: 22
> physical id	: 6
> node id		: 0
> core id		: 2
> apicid		: 50
> initial apicid	: 50
> processor	: 23
> physical id	: 7
> node id		: 0
> core id		: 2
> apicid		: 58
> initial apicid	: 58
> processor	: 24
> physical id	: 0
> node id		: 0
> core id		: 3
> apicid		: 3
> initial apicid	: 3
> processor	: 25
> physical id	: 1
> node id		: 0
> core id		: 3
> apicid		: 11
> initial apicid	: 11
> processor	: 26
> physical id	: 2
> node id		: 0
> core id		: 3
> apicid		: 19
> initial apicid	: 19
> processor	: 27
> physical id	: 3
> node id		: 0
> core id		: 3
> apicid		: 27
> initial apicid	: 27
> processor	: 28
> physical id	: 4
> node id		: 0
> core id		: 3
> apicid		: 35
> initial apicid	: 35
> processor	: 29
> physical id	: 5
> node id		: 0
> core id		: 3
> apicid		: 43
> initial apicid	: 43
> processor	: 30
> physical id	: 6
> node id		: 0
> core id		: 3
> apicid		: 51
> initial apicid	: 51
> processor	: 31
> physical id	: 7
> node id		: 0
> core id		: 3
> apicid		: 59
> initial apicid	: 59
> processor	: 32
> physical id	: 0
> node id		: 0
> core id		: 4
> apicid		: 4
> initial apicid	: 4
> processor	: 33
> physical id	: 1
> node id		: 0
> core id		: 4
> apicid		: 12
> initial apicid	: 12
> processor	: 34
> physical id	: 2
> node id		: 0
> core id		: 4
> apicid		: 20
> initial apicid	: 20
> processor	: 35
> physical id	: 3
> node id		: 0
> core id		: 4
> apicid		: 28
> initial apicid	: 28
> processor	: 36
> physical id	: 4
> node id		: 0
> core id		: 4
> apicid		: 36
> initial apicid	: 36
> processor	: 37
> physical id	: 5
> node id		: 0
> core id		: 4
> apicid		: 44
> initial apicid	: 44
> processor	: 38
> physical id	: 6
> node id		: 0
> core id		: 4
> apicid		: 52
> initial apicid	: 52
> processor	: 39
> physical id	: 7
> node id		: 0
> core id		: 4
> apicid		: 60
> initial apicid	: 60
> processor	: 40
> physical id	: 0
> node id		: 0
> core id		: 5
> apicid		: 5
> initial apicid	: 5
> processor	: 41
> physical id	: 1
> node id		: 0
> core id		: 5
> apicid		: 13
> initial apicid	: 13
> processor	: 42
> physical id	: 2
> node id		: 0
> core id		: 5
> apicid		: 21
> initial apicid	: 21
> processor	: 43
> physical id	: 3
> node id		: 0
> core id		: 5
> apicid		: 29
> initial apicid	: 29
> processor	: 44
> physical id	: 4
> node id		: 0
> core id		: 5
> apicid		: 37
> initial apicid	: 37
> processor	: 45
> physical id	: 5
> node id		: 0
> core id		: 5
> apicid		: 45
> initial apicid	: 45
> processor	: 46
> physical id	: 6
> node id		: 0
> core id		: 5
> apicid		: 53
> initial apicid	: 53
> processor	: 47
> physical id	: 7
> node id		: 0
> core id		: 5
> apicid		: 61
> initial apicid	: 61
> 
> Thanks.
> 
> /ac
> 
>