From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758406AbZHQX1h (ORCPT ); Mon, 17 Aug 2009 19:27:37 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1758398AbZHQX1f (ORCPT ); Mon, 17 Aug 2009 19:27:35 -0400 Received: from mail.vyatta.com ([76.74.103.46]:55748 "EHLO mail.vyatta.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758394AbZHQX1d (ORCPT ); Mon, 17 Aug 2009 19:27:33 -0400 Date: Mon, 17 Aug 2009 16:27:29 -0700 From: Stephen Hemminger To: john stultz Cc: Andrew Morton , Thomas Gleixner , linux-kernel@vger.kernel.org Subject: Re: clocksource changes in 2.6.31 - possible regression Message-ID: <20090817162729.451613b4@nehalam> In-Reply-To: <1250551074.7212.84.camel@localhost.localdomain> References: <20090817090319.20979986@nehalam> <1250531337.26171.12.camel@work-vm> <20090817110127.40ee5c29@nehalam> <1250532954.26171.35.camel@work-vm> <20090817112704.2b4b2987@nehalam> <1250543459.7212.41.camel@localhost.localdomain> <1250545077.7212.49.camel@localhost.localdomain> <20090817144546.7f1d6572@nehalam> <1250547802.7212.82.camel@localhost.localdomain> <20090817160212.029b3e42@nehalam> <1250551074.7212.84.camel@localhost.localdomain> Organization: Vyatta X-Mailer: Claws Mail 3.6.1 (GTK+ 2.16.1; x86_64-pc-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 17 Aug 2009 16:17:54 -0700 john stultz wrote: > On Mon, 2009-08-17 at 16:02 -0700, Stephen Hemminger wrote: > > On Mon, 17 Aug 2009 15:23:22 -0700 > > john stultz wrote: > > > > > On Mon, 2009-08-17 at 14:45 -0700, Stephen Hemminger wrote: > > > > On Mon, 17 Aug 2009 14:37:57 -0700 > > > > john stultz wrote: > > > > > However, I think its fair, that as your TSC is being disqualified for > > > > > being an old AMD SMP box, and there is a *possibility* that if you don't > > > > > run with cpufreq and the SUMA-ness of the box didn't get in the way of > > > > > TSC synchronization, you might have an argument for overriding the > > > > > unsynchronized_tsc() heuristics. > > > > > > > > > > Luckily the option is already there. :) > > > > > > > > > > So try booting with "tsc=reliable" to override those checks, and I think > > > > > you'll be able to do what you want to do. > > > > > > > > > > > > > Good idea, doesn't work. > > > > > > > > vyatta@amd1:~$ cat /proc/cmdline > > > > BOOT_IMAGE=/boot/vmlinuz-2.6.31-rc6 root=/dev/sda1 ro tsc=reliable > > > > vyatta@amd1:~$ cat /sys/devices/system/clocksource/clocksource0/available_clocksource > > > > acpi_pm > > > > > > Bah! My apologies for half-assing this. > > > > > > How about with the following *tested* patch (includes a variant of > > > Thomas' fix). > > > > > > thanks > > > -john > > > > > > > > > Signed-off-by: John Stultz > > > > > > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > > > index 71f4368..648fb26 100644 > > > --- a/arch/x86/kernel/tsc.c > > > +++ b/arch/x86/kernel/tsc.c > > > @@ -825,6 +825,9 @@ __cpuinit int unsynchronized_tsc(void) > > > > > > if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) > > > return 0; > > > + > > > + if (tsc_clocksource_reliable) > > > + return 0; > > > /* > > > * Intel systems are normally all synchronized. > > > * Exceptions must mark TSC as unstable: > > > @@ -832,10 +835,10 @@ __cpuinit int unsynchronized_tsc(void) > > > if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) { > > > /* assume multi socket systems are not synchronized: */ > > > if (num_possible_cpus() > 1) > > > - tsc_unstable = 1; > > > + return 1; > > > } > > > > > > - return tsc_unstable; > > > + return 0; > > > } > > > > > > static void __init init_tsc_clocksource(void) > > > > > > > > > > This adds tsc, but makes it first? it is reliable, but do I want > > to make it most important? > > > > $ cat /sys/devices/system/clocksource/clocksource0/available_clocksource > > tsc acpi_pm > > > Well, if you're overriding the system saying that its safe, then sure, > its better then anything else, why wouldn't we? > That's acceptable, maybe add change to Documentation/kernel-parameters.txt tsc= Disable clocksource-must-verify flag for TSC. Format: [x86] reliable: mark tsc clocksource as reliable and makes tsc the default clocksource; this disables clocksource verification at runtime. Used to enable high-resolution timer mode on older hardware, and in virtualized environment. --