Re: x86, amd: Get multi-node CPU info from NodeId MSR instead of PCI config space

[Andreas Herrmann <herrmann.der.user@googlemail.com>]

On Fri, Oct 16, 2009 at 02:38:53PM +0200, Ingo Molnar wrote:
> 
> * Andreas Herrmann <herrmann.der.user@googlemail.com> wrote:
> 
> > Use newly introduced NodeId MSR to get NodeId and number of nodes per 
> > processor.
> 
> What will happen on CPUs that dont have this MSR and got this info from 
> the PCI config space:

No PCI config space needed as all Magny-Cours CPUs should support this
when launched.

> >  static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c)
> >  {
> > -#ifdef CONFIG_PCI
> > -	u32 t, cpn;
> > -	u8 n, n_id;
> >  	int cpu = smp_processor_id();
> >  
> >  	/* fixup topology information only once for a core */
> >  	if (cpu_has(c, X86_FEATURE_AMD_DCM))
> >  		return;
> >  
> > -	/* check for multi-node processor on boot cpu */
> > -	t = read_pci_config(0, 24, 3, 0xe8);
> > -	if (!(t & (1 << 29)))
> >  		return;
> >  
> >  	set_cpu_cap(c, X86_FEATURE_AMD_DCM);
> 
> are there any such CPUs?

Only Magny-Cours so far.

> I.e. we want to know the effect of this patch 
> on various models of AMD CPUs - is the change really .32 safe? Does it 
> solve any problem that makes it .32 material versus being for .33?

IMHO getting rid of the PCI config space accesses as soon as possible
is a benefit, I think.


Andreas