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From: Ingo Molnar <mingo@elte.hu>
To: Dave Jones <davej@redhat.com>,
	x86@kernel.org, Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: Fix typo in intel cache size
Date: Tue, 10 Nov 2009 21:53:42 +0100	[thread overview]
Message-ID: <20091110205342.GA23196@elte.hu> (raw)
In-Reply-To: <20091110200120.GA27090@redhat.com>


* Dave Jones <davej@redhat.com> wrote:

> I double-checked the datasheet. This should be 2MB.
> 
> Signed-off-by: Dave Jones <davej@redhat.com>
> 
> diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
> index 804c40e..6123138 100644
> --- a/arch/x86/kernel/cpu/intel_cacheinfo.c
> +++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
> @@ -94,7 +94,7 @@ static const struct _cache_table __cpuinitconst cache_table[] =
>  	{ 0xd1, LVL_3,    1024 },	/* 4-way set assoc, 64 byte line size */
>  	{ 0xd2, LVL_3,    2048 },	/* 4-way set assoc, 64 byte line size */
>  	{ 0xd6, LVL_3,    1024 },	/* 8-way set assoc, 64 byte line size */
> -	{ 0xd7, LVL_3,    2038 },	/* 8-way set assoc, 64 byte line size */
> +	{ 0xd7, LVL_3,    2048 },	/* 8-way set assoc, 64 byte line size */

ah, thanks - applied.

I also marked both fixes from you for -stable backport - these are 
pretty risk-free fixes and cpuinfo looks ugly on new CPUs without a 
proper cache size entry.

Thanks,

	Ingo

  reply	other threads:[~2009-11-10 20:53 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-11-10 20:01 Fix typo in intel cache size Dave Jones
2009-11-10 20:53 ` Ingo Molnar [this message]
2009-11-10 20:55 ` [tip:x86/urgent] x86: Fix typo in Intel CPU cache size descriptor tip-bot for Dave Jones

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